m Verilog implementation of FPGA-based BPSK modulation and demodulation communication system, including testbench, excluding carrier synchronization - Code World

m Verilog implementation of FPGA-based BPSK modulation and demodulation communication system, including testbench, excluding carrier synchronization

Enterprise 2023-05-04 15:50:01 views: null

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Origin blog.csdn.net/hlayumi1234567/article/details/130395858

m Verilog implementation of FPGA-based BPSK modulation and demodulation communication system, including testbench, excluding carrier synchronization

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m Verilog implementation of FPGA-based DQPSK modulation and demodulation communication system, including testbench, excluding carrier synchronization

m FPGA-based 8PSK modulation and demodulation system verilog implementation, including testbench test files

m FPGA-based OFDM modulation and demodulation system verilog implementation, including IFFT, FFT and shaping filters, including testbench

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m FPGA-based implementation of costas ring carrier synchronization verilog, including testbench, which can modify the frequency offset

m FPGA-based QPSK soft demodulation verilog implementation, including testbench and MATLAB auxiliary verification program

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m FPGA-based 256QAM modulation signal generation module verilog implementation, including testbench

m FPGA-based 1024QAM modulation signal generation module verilog implementation, including testbench

m FPGA-based communication data frame scrambling and descrambling verilog implementation, including testbench

m Verilog implementation of FPGA-based interleaving and deinterleaving system, including testbench

m FPGA-based AGC adaptive gain control system verilog implementation, including testbench

m FPGA-based CRC cyclic redundancy check system verilog implementation, including testbench

m FPGA-based 4FSK modem system verilog implementation, including testbench test files

m FPGA-based 8FSK modem system verilog implementation, including testbench test files

m FPGA-based 4ASK modem system verilog implementation, including testbench test files

m FPGA-based 8ASK modem system verilog implementation, including testbench test files

m FPGA-based OFDM system verilog implementation, including IFFT, FFT, shaping filtering and CP addition and CP removal, including testbench

m FPGA-based data serial-to-parallel conversion system verilog implementation, including testbench, can configure the number of parallel

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