1. Algorithm simulation effect

This system develops the Vivado2019.2 platform, and the Vivado2019.2 simulation results are as follows:

Import the baseband into MATLAB to display the constellation diagram:

2. Algorithms involve an overview of theoretical knowledge

256QAM modulation is a high-order modulation method with high transmission rate and spectral efficiency. In digital communication system, how to generate 256QAM modulation signal is an important issue. This article introduces a FPGA-based 256QAM modulation signal generation method, which generates 256QAM modulation signals by mapping baseband signals to 256QAM modulation symbols.

2.1. Problem description

256QAM modulated signal can be expressed as:

$$
s(t)=\sum_{i=1}^{N}I_i(t)cos(2\pi f_ct)-Q_i(t)sin(2\pi f_ct)
$$

Among them, N=256 is the number of modulation symbols, I_i(t) and Q_i(t) are the real part and imaginary part of the i-th modulation symbol, respectively, and f_c is the carrier frequency.

Our goal is to generate a 256QAM modulated signal such that the real and imaginary parts of each modulation symbol are pm\frac{1}{\sqrt{42}}, pm\frac{3}{\sqrt{42}}, pm\frac{5}{\sqrt{42}}, pm\frac{7}{\sqrt{42}} or pm\frac{9}{\sqrt{42}}.

2.2. Algorithm principle

In order to map the baseband signal to the 256QAM modulation symbol, we can use the common gray mapping method. Specifically, we can divide the baseband signal into two parts: real and imaginary. Then, we can map the real and imaginary parts into 5 discrete amplitude values, as shown in the following table:

Amplitude value Real part value Imaginary part value
1 1 1
3 1 3
5 3 1
7 3 3
9 5 1
Then, we can combine the real and imaginary part amplitude values into 256QAM modulation symbols, as shown in the figure below:

2.3 Modulation method

In order to generate a 256QAM modulation signal, we can filter the mapped modulation symbols through a band-pass filter, and then mix the filtered signal to obtain a 256QAM modulation signal with a carrier. Specifically, we can use the I and Q two-way sine waves as the local oscillator, multiply the mapped modulation symbols by the corresponding sine waves, and then add the results to obtain a 256QAM modulation signal with a carrier.

2.4. Implementation steps

The baseband signal is gray-mapped to obtain the amplitude values of the real part and the imaginary part.

Combine the magnitude values of the real and imaginary parts into 256QAM modulation symbols.

The 256QAM modulation symbols are filtered through a bandpass filter.

The filtered signal is mixed to obtain a 256QAM modulated signal with a carrier.

An FPGA-based 256QAM modulation signal generation method, the method generates 256QAM modulation signals by mapping baseband signals to 256QAM modulation symbols. Experimental results show that the algorithm can effectively generate 256QAM modulated signals with high transmission rate and spectral efficiency. The implementation steps of the algorithm are simple and easy to implement, and it is suitable for high-speed data transmission scenarios in digital communication systems. In the future, we will further explore the performance of the algorithm in practical applications, in order to better meet the needs of digital communication systems.

3. Verilog core program


module TEST;

	reg clk;
	reg rst;
	reg start;

    wire  [7:0] parallel_data;
    wire [15:0]sin;
    wire [15:0]cos;
	wire signed[19:0]  I_com;
	wire signed[19:0]  Q_com;
    wire signed[15:0]I_comcos;
    wire signed[15:0]Q_comsin;
	 

	// DUT
	tops_256QAM_mod  top(
	   .clk(clk),
	   .rst(rst),
	   .start(start),
	   .parallel_data(parallel_data),
	   .sin(sin),
	   .cos(cos),
	   .I_com(I_com),
	   .Q_com(Q_com),
	   .I_comcos(I_comcos),
	   .Q_comsin(Q_comsin)
	   );
	   
 
	   
 
	initial begin
		clk = 0;
		rst = 0;
		start = 1;
		#10;
		rst = 1;
	end
	
	always #5
	clk <= ~clk;
	
integer fout1;
integer fout2;
initial begin
 fout1 = $fopen("II.txt","w");
 fout2 = $fopen("QQ.txt","w"); 
end



  reg [4:0]dcnt=5'd0;
  always @(posedge clk) begin
    if(rst == 0) begin
      dcnt <= 0;
 end
      begin
      dcnt <= dcnt+5'd1;
      end 
  end
  
  
always @ (posedge dcnt[4])
 begin
     if(rst==1)
     begin
   	 $fwrite(fout1,"%d\n",I_com);
	 $fwrite(fout2,"%d\n",Q_com);
	 end
end

endmodule
00_023m

4. Complete algorithm code file

m FPGA-based 256QAM modulation signal generation module verilog implementation, including testbench