Table of contents
1. Algorithm simulation effect
2. Summary of theoretical knowledge involved in algorithms
2.2 Design and implementation of 8PSK modem based on FPGA
4. Obtain the complete algorithm code file
1. Algorithm simulation effect
The vivado simulation results are as follows:
Use matlab to look at the 8PSK constellation chart:
2. Summary of theoretical knowledge involved in algorithms
With the continuous development of communication technology, phase modulation technology is widely used in wireless communication systems because of its high spectral efficiency and anti-interference ability. Among them, 8PSK (8-phase phase shift keying), as a high-order modulation method, has higher spectral efficiency and stronger anti-interference ability, so it has attracted much attention. However, the implementation complexity of 8PSK modulation and demodulation is high and requires efficient digital signal processing technology. As a programmable logic device, field programmable gate array (FPGA) has a high degree of flexibility and parallel processing capabilities, and is very suitable for implementing complex digital signal processing algorithms.
2.1 8PSK modulation principle
8PSK modulation is a phase modulation method. Its basic principle is to transmit information by changing the phase of the carrier wave. In 8PSK, the phase change within one symbol period has 8 possible states, each corresponding to 3 bits of information. Therefore, 8PSK modulation can be regarded as a mapping method that maps 3 bits to one symbol. Specifically, assuming that the input bit sequence is b2b1b0, the corresponding 8PSK symbol can be expressed as:
S(t)=Acos(2πfct+θk) （1）
where, A is the amplitude of the carrier wave, fc is the frequency of the carrier wave, θk is the phase of the k-th symbol, k=0,1,...,7. The value of θk is determined by the input bit sequence b2b1b0. The specific mapping relationship is shown in Table 1.
Table 1: 8PSK mapping relationship
Its constellation diagram is as follows:
2.2 Design and implementation of 8PSK modem based on FPGA
FPGA is a programmable logic device that contains a large number of programmable logic units and storage units, which can be flexibly configured according to user needs. FPGA has the following advantages:
(1) High degree of flexibility: FPGA can reconfigure logic circuits according to user needs to achieve different functions. This flexibility allows FPGAs to adapt to a variety of complex communication systems and algorithm requirements.
(2) Parallel processing capability: The logic units inside the FPGA can work in parallel and process multiple data at the same time. This parallel processing capability allows FPGAs to efficiently implement complex digital signal processing algorithms.
(3) High performance and low power consumption: FPGA’s logic units and storage units adopt high-performance technology and design, which can achieve high-speed data processing and storage. At the same time, FPGA also has the characteristics of low power consumption and is suitable for use in mobile communications and other scenarios that require long working hours.
In the FPGA-based 8PSK modulation and demodulation system, digital signal processing algorithm is one of the key parts. Specifically, the modulator needs to map the input bit sequence to the corresponding 8PSK symbol sequence; the demodulator needs to recover the original bit sequence from the received symbol sequence. To achieve these functions, we use the following algorithm:
(1) Modulation algorithm: According to the input bit sequence and the mapping relationship in Table 1, calculate the corresponding 8PSK symbol sequence. This process can be implemented through lookup tables or calculations. In order to reduce complexity and improve efficiency, we use a lookup table to implement the modulation algorithm. Specifically, we store the mapping relationship in Table 1 in a lookup table, and then find the corresponding 8PSK symbol sequence according to the input bit sequence. This method can reduce the complexity of the algorithm while ensuring correctness.
(2) Demodulation algorithm: Recovering the original bit sequence from the received symbol sequence is a relatively complex process. We compare the received symbol sequence with a known 8PSK symbol Sequences are compared.
3.Verilog core program
`timescale 1ns / 1ps
//
// Company:
// Engineer:
//
// Create Date: 2023/05/03 06:21:37
// Design Name:
// Module Name: TEST
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
module TEST();
reg i_clk;
reg i_clksample;
reg i_rst;
reg i_dat;
wire[2:0]o_ISET;
wire o_clk_3div;
wire signed[15:0]o_I8psk;
wire signed[15:0]o_Q8psk;
wire signed[15:0]o_Ifir_T;
wire signed[15:0]o_Qfir_T;
wire signed[15:0]o_cos_T;
wire signed[15:0]o_sin_T;
wire signed[31:0]o_modc_T;
wire signed[31:0]o_mods_T;
wire signed[31:0]o_mod_T;
wire signed[15:0]o_cos_R;
wire signed[15:0]o_sin_R;
wire signed[31:0]o_modc_R;
wire signed[31:0]o_mods_R;
wire signed[31:0]o_Ifir_R;
wire signed[31:0]o_Qfir_R;
//DQPSK调制
T8PSK T8PSKU(
.i_clk (i_clk),
.i_clksample(i_clksample),
.i_rst (i_rst),
.i_dat (i_dat),
.o_ISET (o_ISET),
.o_clk_3div(o_clk_3div),
.o_I8psk(o_I8psk),
.o_Q8psk(o_Q8psk),
.o_Ifir (o_Ifir_T),
.o_Qfir (o_Qfir_T),
.o_cos (o_cos_T),
.o_sin (o_sin_T),
.o_modc (o_modc_T),
.o_mods (o_mods_T),
.o_mod (o_mod_T)
);
//8PSK解调
wire [2:0]o_wbits;
wire o_bits;
R8PSK R8SKU(
.i_clk (i_clk),
.i_clksample(i_clksample),
.i_rst (i_rst),
.o_clk_3div(),
.i_med (o_mod_T[25:10]),
.o_cos (o_cos_R),
.o_sin (o_sin_R),
.o_modc (o_modc_R),
.o_mods (o_mods_R),
.o_Ifir (o_Ifir_R),
.o_Qfir (o_Qfir_R),
.o_wbits(o_wbits),
.o_bits(o_bits)
);
initial
begin
i_clk = 1'b1;
i_clksample= 1'b1;
i_rst = 1'b1;
#12000
i_rst = 1'b0;
end
always #80 i_clk=~i_clk;
always #5 i_clksample=~i_clksample;
initial
begin
i_dat = 1'b0;
#12000
repeat(10000)
begin
#160 i_dat = 1'b1;
#160 i_dat = 1'b1;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b1;
#160 i_dat = 1'b0;
#160 i_dat = 1'b1;
#160 i_dat = 1'b1;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b1;
#160 i_dat = 1'b1;
#160 i_dat = 1'b1;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b1;
#160 i_dat = 1'b0;
#160 i_dat = 1'b0;
#160 i_dat = 1'b1;
#160 i_dat = 1'b1;
#160 i_dat = 1'b0;
end
end
//显示发射端带相位旋转的星座图
integer fout1;
integer fout2;
initial begin
fout1 = $fopen("It.txt","w");
fout2 = $fopen("Qt.txt","w");
end
always @ (posedge i_clk)
begin
if(i_rst==0)
begin
$fwrite(fout1,"%d\n",o_I8psk);
$fwrite(fout2,"%d\n",o_Q8psk);
end
else begin
$fwrite(fout1,"%d\n",0);
$fwrite(fout2,"%d\n",0);
end
end
endmodule
00_052m4. Obtain the complete algorithm code file
IN