[AGC+FPGA] FPGA-based digital AGC adaptive gain design, applied in BPSK modulation and demodulation system

        AGC test, here we mainly analyze the working effect of AGC by generating a signal and inputting it into the AGC. The simulation results are shown in the following figure:

 Here, when we use the test signal, we implement the AGC function by inputting a sinusoidal signal.

        BPSK demodulation part, only the test part here, because the original program includes the AD part, this part is the digital signal obtained after the analog-to-digital conversion of the external data, this simulation cannot be simulated.

       The simulation test of the BPSK demodulation part is as follows:

module BPSKTop(
   input wire clk,
	input wire rst,
   input wire CE1x,
   input wire CE2x,
   input wire CE4x,
   input wire CE128x,
   input wire Reset,
   input wire[15:0] DI,
   input wire[15:0] DQ,
   input wire[31:0] BTRThr,
   output wire[15:0] TPBus1,
   output wire[15:0] TPBus2,
   output wire[15:0] TPBus3,
   output wire PLLLockFlag,
   output wire[15:0] BestSampleI,
   output wire[15:0] BestSampleQ,
   output wire BTRDecisionEn,
   output wire BTRDecisionData);

   wire [15:0] LPFOutI;
   wire [15:0] LPFOutQ;
   wire [15:0] SumLPFOutI;
   wire [15:0] SumLPFOutQ;
   wire [32:0] PLLComplexMultiplerOutI;
   wire [32:0] PLLComplexMultiplerOutQ;
   wire [15:0] NCOCosin;
   wire [15:0] NCOSin;
   wire [15:0] BPSKPLLSourceReal;
   wire [15:0] BPSKPLLSourceImag; 
   wire [15:0] BestSampleITmp;
   wire [15:0] BestSampleQTmp;
   wire TmpBit;
   wire [15:0] TmpSymbol;

BPSKTop_ComplexMult BPSKTop_ComplexMult_ins(
    .clk(clk),
	 .rst(rst),
    .DI(DI),
	 .DQ(DQ),
	 .NCOCosin(NCOCosin),
	 .NCOSin(NCOSin),
	 .PLLComplexMultiplerOutI(PLLComplexMultiplerOutI),
	 .PLLComplexMultiplerOutQ(PLLComplexMultiplerOutQ));
  
BPSKPLLTop U_BPSKPLLTop(
	.clk(clk), 
	.CE128x(CE128x), 
	.Reset(rst), 
	.SinkReal(PLLComplexMultiplerOutI[31:16]), 
	.SinkImag(PLLComplexMultiplerOutQ[31:16]), 
	.BPSKPLLLockFlagOut(PLLLockFlag), 
	.NCOCosin(NCOCosin), 
	.NCOSin(NCOSin), 
	.SourceReal(BPSKPLLSourceReal), 
	.SourceImag(BPSKPLLSourceImag));
   
	
	
	
SumClearFilter U_SumClearFilter(
   .clk(clk), 
	.CEx(CE128x), 
	.SinkReal(PLLComplexMultiplerOutI[31:16]), 
	.SinkImag(PLLComplexMultiplerOutQ[31:16]), 
	.SourceReal(LPFOutI), 
	.SourceImag(LPFOutQ));

BTRTop U_BTRTop(
   .clk(clk), 
	.CE1x(CE1x), 
	.CE2x(CE2x), 
	.DI(PLLComplexMultiplerOutI[31:16]), 
	.DQ(PLLComplexMultiplerOutQ[31:16]), 
	.BTRThr(BTRThr), 
	.BestSampleI(BestSampleITmp), 
	.BestSampleQ(BestSampleQTmp), 
	.BTRDecisionEn(BTRDecisionEn), 
	.BTRDecisionData(BTRDecisionData));
   
assign BestSampleI = BestSampleITmp;
assign BestSampleQ = BestSampleQTmp;
assign TPBus1 = BPSKPLLSourceReal;
assign TPBus2 = BPSKPLLSourceImag;
assign TPBus3 = SumLPFOutI;
   
endmodule

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A15-04

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Origin blog.csdn.net/ccsss22/article/details/123964309
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