m Verilog implementation of FPGA-based DQPSK modulation and demodulation communication system, including testbench, excluding carrier synchronization

Table of contents

1. Algorithm simulation effect

2. Algorithms involve an overview of theoretical knowledge

3. Verilog core program

4. Complete algorithm code file


1. Algorithm simulation effect


The system has been developed on two platforms, namely:

Vivado2019.2

Quartusii18.0+ModelSim-Altera 6.6d Starter Edition

The Vivado2019.2 simulation results are as follows:

The above signals are amplified, and the meanings of each signal are as follows:

 The test results of Quartusii18.0+ModelSim-Altera 6.6d Starter Edition are as follows:

2. Algorithms involve an overview of theoretical knowledge

       The DQPSK modem communication system is a digital communication system used to convert digital information into electrical signals for transmission. DQPSK, which stands for Differential Quadrature Shift Keying, is a digital modulation technique that encodes digital information at the transmitting end and decodes the signal at the receiving end. DQPSK modulation and demodulation communication system has the advantages of high efficiency, reliability and anti-interference, etc., and is widely used in modern communication systems.

1. DQPSK modulation principle

       DQPSK modulation is a modulation method that transmits digital information by changing the phase of the signal. In DQPSK modulation, each symbol represents two bits, therefore, a DQPSK modulator needs to combine two consecutive bits to form a symbol. The DQPSK modulator avoids the phase drift problem by using a differential encoder, a technique that encodes the phase difference between adjacent symbols into one bit.

The following is the mathematical formula for the DQPSK modulator:

Each symbol represents two bits, therefore, the input bit string b1 and b2 can form a symbol s, the formula is as follows:
$s = \cos(\theta_1+\theta_0)$

Among them, $\theta_1$ is the phase of the previous symbol, and $\theta_0$ represents the phase of this symbol.

The DQPSK modulator needs to calculate the phase difference based on the phase of the previous symbol and this symbol, the formula is as follows:
$\Delta\theta = \arctan\left(\frac{\sin(\theta_1+\theta_0)\cos(\theta_0) -\cos(\theta_1+\theta_0)\sin(\theta_0)}{\cos(\theta_1+\theta_0)\cos(\theta_0)+\sin(\theta_1+\theta_0)\sin(\theta_0)}\right) $

Finally, the DQPSK modulator needs to map the phase difference to the phase plane, the formula is as follows:
$s = \cos(\theta_1+\theta_0+\Delta\theta)$

2. Principle of DQPSK demodulation

        The DQPSK demodulator needs to calculate the phase difference based on the received signal, and then decode the phase difference into digital information. The DQPSK demodulator uses a low-pass filter to filter out high-frequency noise and divides the received signal into two time windows. Next is the mathematical formula for the DQPSK demodulator:

The received signal r can be expressed as:
$r = s\cos(\theta_0)+n$

where $\theta_0$ is the phase of the local reference signal and n is the received noise.

Next, divide the received signal r into two time windows r1 and r2:
$r_1 = r_{T/2-1:0}$

$r_2 = r_{T-1:T/2}$

where T is the duration of a symbol.

Calculate the phase difference, the formula is as follows:
$\Delta\theta = \arctan\left(\frac{h\sin(2\pi fT)(r_1\cos(\theta_0)-r_2\sin(\theta_0))}{h \cos(2\pi fT)(r_2\cos(\theta_0)+r_1\sin(\theta_0))}\right)$

where h is the transfer function of the low-pass filter and f is the carrier frequency.

Finally, the phase difference is decoded into digital information, the formula is as follows:
$b_1 = \Delta\theta > 0$

$b_2 = |\Delta\theta| > \pi/2$

Here, if the phase difference $\Delta\theta$ is greater than 0, set $b_1$ to 1, otherwise set it to 0; if the absolute value of the phase difference is greater than $\pi/2$, set $b_2$ to 1 , otherwise set to 0.

3. Implementation process of DQPSK modulation and demodulation algorithm

The following is the implementation process of the DQPSK modulation and demodulation algorithm:

Generating a local reference signal
      In a DQPSK modulation-demodulation communication system, the transmitting end and the receiving end need to use carrier signals of the same frequency and phase. Therefore, a local reference signal needs to be generated at the receiving end to demodulate the received signal. The local reference signal can be generated using a simple sine wave oscillator with the following formula:

$\theta_0(nT) = \theta_0((n-1)T) + 2\pi f_0 T$

Among them, $f_0$ is the carrier frequency, and $T$ is the duration of one symbol.

Perform DQPSK modulation
       DQPSK modulator needs to combine two consecutive bits to form a symbol, then calculate the phase difference according to the phase of the previous symbol and this symbol, and finally map the phase difference to the phase plane.

3. Verilog core program

module TEST();

reg i_clk;
reg i_rst;
reg i_clkSYM;
reg i_dat;
 
wire o_Idiff;
wire o_Qdiff;
wire signed[15:0]o_Ifir_T;
wire signed[15:0]o_Qfir_T;
wire signed[15:0]o_cos_T;
wire signed[15:0]o_sin_T;
wire signed[31:0]o_modc_T;
wire signed[31:0]o_mods_T;
wire signed[31:0]o_mod_T;

wire signed[15:0]o_cos_R;
wire signed[15:0]o_sin_R;
wire signed[31:0]o_modc_R;
wire signed[31:0]o_mods_R;
wire signed[31:0]o_Ifir_R;
wire signed[31:0]o_Qfir_R;

wire o_I;
wire o_Q;
wire o_bits;

//DQPSK调制
TDQPSK TQPSKU(
.i_clk  (i_clk),
.i_rst  (i_rst),
.i_clkSYM(i_clkSYM),
.i_dat  (i_dat),
.o_Idiff(o_Idiff),
.o_Qdiff(o_Qdiff),

.o_Ifir (o_Ifir_T),
.o_Qfir (o_Qfir_T),
.o_cos  (o_cos_T),
.o_sin  (o_sin_T),
.o_modc (o_modc_T),
.o_mods (o_mods_T),
.o_mod  (o_mod_T)
);

 


//DQPSK解调
RDQPSK RQPSKU(
.i_clk  (i_clk),
.i_rst  (i_rst),
.i_clkSYM(i_clkSYM),
.i_med  (o_mod_T[25:10]),
.o_cos  (o_cos_R),
.o_sin  (o_sin_R),
.o_modc (o_modc_R),
.o_mods (o_mods_R),
.o_Ifir (o_Ifir_R),
.o_Qfir (o_Qfir_R),
.o_I(o_I),
.o_Q(o_Q),
.o_bits(o_bits)
);

initial
begin
    i_clk = 1'b1;
    i_clkSYM=1'b1;
    i_rst = 1'b1;
    #1600
    i_rst = 1'b0;
end

always #5 i_clk=~i_clk;
always #80 i_clkSYM=~i_clkSYM;


initial
begin
    i_dat = 1'b0;
    #1440
    repeat(10)
    begin
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b0;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b1;
    #160 i_dat = 1'b0;
    
    
    end
    $stop();
end
endmodule
00_016m

4. Complete algorithm code file

V

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Origin blog.csdn.net/hlayumi1234567/article/details/131333525