[FPGA tutorial case 10] Design and implementation of complex multiplier based on Verilog

Enterprise 2022-07-04 15:24:25 views: null

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1. Software version

vivado2019.2

2. Theoretical knowledge of this algorithm and Verilog program

In digital signal processing, complex multiplication has many applications, including signal mixing, FFT, and IFFT. The formula for calculating the complex multiplier is as follows:

make plural

x = a + b i,

y = c + d i,

Then the result of multiplying complex numbers is:

x * y = (a + b i)*(c + d i) = (ac - bd) + i (ad + bc) 。

It can be seen from this that a complex multiplier includes four multipliers (complete a*c, b*d, a*d and b*c) and three adders.

For the implementation of the multiplier, refer to the previous course:

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Origin blog.csdn.net/ccsss22/article/details/125609880

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