Table of contents
1 Introduction
The design of digital chips often needs to be accompanied by verification personnel to verify the HDL code designed by the designer to verify whether the code structure is complete for the required functions.
This blog aims to describe the basic skills necessary for beginners in digital IC verification. Students who need it can take it by themselves.
2. Required skills
Interested students can also study in the following order.
● Verilog
It is a kind of hardware description language. It can be used in digital electronic system design, simulation verification, timing analysis, and logic synthesis of digital logic systems. It is currently the most widely used hardware description language.
● Systemverilog
It is expanded based on Verilog language and introduces object-oriented design technology, which can be designed more flexibly to meet various needs of digital verification.
SystemVerilog HVL: Introduction and content navigation
● UVM
The verification framework built with Systemverilog language can verify modules of various levels based on this framework. It is the most popular digital verification framework today.
Universal Verification Methodology (UVM): Introduction and content navigation
● Linux
Digital IC is basically designed and verified in the Linux environment, so the basic operation of Linux is essential!
Linux: Directory and file handling commands
Linux: System Operation Commands
● TCL
A scripting language, which is the interactive command language of most EDA tools, so it has high cross-platform reusability.
● VCS
After learning the language and framework, you need a software platform for simulation, VCS is a commonly used simulation tool.
Compilation and simulation of VCS and waveform viewing of Verdi based on Makefile
Of course, it is also possible to use modelsim and questasim for simulation under Windows.
Questasim Getting Started Guide
● Python/C++
In the verification platform built using UVM, the reference model needs to use modules written in C/C++.
For data simulation of algorithms, Python/MATLAB is often used to design reference models.
● SVN
A version control tool for those who need it.
Detailed explanation of SVN commands under Linux
Detailed Explanation of SVN Common Commands
3. Future
After learning the above basic skills, the next step is to carry out targeted learning according to specific work scenarios and project requirements, including bus interface, technical protocols, etc.