Digital IC front-end synopsys tool introduction for digital IC learning records

Brief introduction

Briefly summarize some development software (Synopsys) currently used in IC front-end design.

1. scl

License management

2.VCS( verilog compiled simulator )

Verilog compiler simulator, now the company's mainstream simulator, has the same function as modelsim under windows.

3. Verdi / dve

verdi is a more powerful debug tool, two basic waveform viewing tools

4.DC( Design Compiler )

The comprehensive realization tool must be used in conjunction with the process library.

5.ICC( IC Compiler )

Place and route tools

6.PT( PrimeTime )

Static timing analysis tool

This is my simple understanding. If you have any mistakes, you are welcome to communicate! ! !


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Origin blog.csdn.net/weixin_40377195/article/details/104803061