Digital IC front-end study notes: arbitration polling (1)

related articles

Table of contents

1. About Arbitration

When multiple sources or users need to share the same resource, some form of arbitration is required so that all users can obtain or access the shared resource based on certain rules or algorithms. For example, on a shared bus, several bus users can be connected. Another example is port arbitration in a switch. When multiple entries want to output data through a certain exit, a certain port arbitration mechanism needs to be used to select which entry is allowed to send data at a certain moment. The simplest arbitration scheme is a fair round-robin scheme. At this time, the arbitrator treats the requests of all users fairly, and different users have equal opportunities. However, if some devices are faster than others, it needs more access to shared resources, or some users have higher processing priority, then a simple round robin scheme is not enough.

In this case, it is more appropriate to use a strict priority round-robin or weighted round-robin scheme. There are also some schemes that combine multiple polling schemes. No matter which scheme is adopted, it should be guaranteed that some users always get resources. The commonly used arbitration scheme will be discussed below.

2. Conventional Arbitration Scheme

According to needs, designers can choose and design their own arbitration (polling) scheme. What follows is a classic scheme that is often used in industry.

strict priority wheel
- Depending on the priority, users have different opportunities to access shared resources.
- Low-priority users may never get resources.
fair polling
- Treat all requests fairly.
- All users have equal access opportunities, and no user will always be unable to obtain resources.
weight polling
- Taking into account both fairness and diversity.
- In a polling cycle, users with different weights will get different access times.
- In a polling cycle, users with different weights will get different access time slices.
Mixed priority (high priority group combined with low priority group)
- Priority round-robin is adopted between groups, and fair round-robin is adopted within the group.

3. Strict priority polling

In a strict priority round-robin scheme, requesting users have a fixed priority. We assume that there are 8 users (agents), agent0 has the highest priority and agent7 has the lowest priority. In this scheme, users with high priority will continue to be authorized as long as they keep requesting. As the priority decreases, so does the chance of the user being authorized. This scheme can provide different services according to the importance of users, but users with low priority may not be served for a long time. At this time, you can prevent low-priority users from being "starved to death" by adding some request constraints to high-priority users. The following figure shows the waveform of strict priority polling.

Strict priority polling code and simulation results are as follows.

module arbiter_strict_priority(clk,resetb,
                                req_vector,
                                end_access_vector,
                                gnt_vector);
    input clk;
    input resetb;
    input [3:0] req_vector;
    input [3:0] end_access_vector;
    output reg [3:0] gnt_vector;
    reg [1:0] arbiter_state,arbiter_state_nxt; 
    reg [3:0]  gnt_vector_nxt;
    wire any_request;

    parameter IDLE = 2'b01;
    parameter END_ACCESS = 2'b10;
    
    assign any_request = (req_vector != 0);
    always@(*) begin
        arbiter_state_nxt = arbiter_state;
        gnt_vector_nxt = gnt_vector;
        case(arbiter_state)
            IDLE:begin
                if(any_request)
                    arbiter_state_nxt = END_ACCESS;
                if(req_vector[0])
                    gnt_vector_nxt = 4'b0001;
                else if(req_vector[1])
                    gnt_vector_nxt = 4'b0010;
                else if(req_vector[2])
                    gnt_vector_nxt = 4'b0100;
                else if(req_vector[3])
                    gnt_vector_nxt = 4'b1000;
            end
            END_ACCESS:begin
                if((end_access_vector[0] & gnt_vector[0]) || 
                   (end_access_vector[1] & gnt_vector[1]) ||
                   (end_access_vector[2] & gnt_vector[2]) ||
                   (end_access_vector[3] & gnt_vector[3])) begin
                    if(any_request) begin
                        arbiter_state_nxt = END_ACCESS;
                        if(req_vector[0])
                            gnt_vector_nxt = 4'b0001;
                        else if(req_vector[1])
                            gnt_vector_nxt = 4'b0010;
                        else if(req_vector[2])
                            gnt_vector_nxt = 4'b0100;
                        else if(req_vector[3])
                            gnt_vector_nxt = 4'b1000;
                    end
                    else begin
                        arbiter_state_nxt = IDLE;
                        gnt_vector_nxt = 4'b0000;
                    end      
                end
            end
        endcase
    end
    
    always@(posedge clk or negedge resetb) begin
        if(!resetb) begin
            arbiter_state <= IDLE;
            gnt_vector <=0;
        end
        else begin
            arbiter_state <= arbiter_state_nxt;
            gnt_vector <= gnt_vector_nxt;
        end
    end
endmodule

In the Verilog implementation process, two states IDLE and END_ACCESS are used, respectively indicating that the arbitrator is in the state of no request and arbiter authorization. Use the register to output the authorization signal, so the gnt_vector_nxt signal is used in the combinational logic always block, and non-blocking assignment is performed in the register operation.

The above content comes from "Verilog Advanced Digital System Design Technology and Example Analysis"