Digital IC front-end study notes: LSFR (Linear Feedback Shift Register)

introduction

LSFR (Linear Feedback Shift Register) is used to generate repeatable pseudo-random sequence PRBS (Pseudo-Random Binary Sequence), the structure includes n-level D flip-flops and some XOR gates (or NOR gates), at each clock edge, the output of the subsequent D flip-flop will be fed back to the previous circuit in some way, and the feedback result is obtained by XOR operation of the output of some registers.

The initial value of LSFR is called the seed of the sequence, and the last-stage flip-flops output the same pseudo-random sequence in a loop (in particular, for Fibonacci LSFR, each flip-flop outputs the same pseudo-random sequence in a loop). The length of the pseudo-random sequence that can be generated by an LFSR circuit composed of n flip-flops is 2^n-1 (minus one is because for the LFSR composed of XOR gates, all 0 states are not allowed to exist, because no matter how XOR the 0 , the results are all 0, which will enter an infinite loop. For the LSFR formed by the NOR gate, the state of all 1 is not allowed to exist, the reason is the same as above). There are currently two commonly used LSFRs: Fibonacci LSFR and Galois LSFR, which are introduced below.

Fibonacci LSFR and Galois LSFR

(1) Fibonacci LSFR (also known as external feedback LSFR, multi-to-one LFSR), that is, the output of multiple flip-flops drives a flip-flop at the front stage through XOR logic. The specific circuit is shown in the figure below.

In this example, the results of x3 and x2 outputs are XORed and connected to the input of the front-end stage x1. The feedback polynomial means that there is tap feedback at the outputs of x3 and x2. And it can be seen that the feedback of the XOR gate is external (that is, the input and output of the XOR gate are not connected to adjacent registers).

(2) Galois LSFR (also known as internal feedback LSFR, one-to-many LSFR), that is, the output of the last-stage flip-flop and the output of the previous-stage flip-flops are XORed to drive the next-stage flip-flop. The specific circuit is as follows As shown in the figure.

In this example, the output of the last stage flip-flop and the result of the output of x3 are XORed and connected to the input of the next stage x2 of x3, and it can be seen that the feedback of the XOR gate is internal (that is, the XOR gate One of the inputs and outputs is connected to adjacent registers).

Usage of LFSR

LFSR has a wide range of applications, and some typical applications are introduced below.

LFSR counter

LFSRs can be used to construct counters that count through random states. Compared with common counters, LFSR counters are fast and consume less logic gates.

Scrambler/Descrambler

LFSRs can be used as scramblers to generate repeating bit patterns. When the repetition interval is large, the bit pattern looks like a random sequence of bits. Before the user data is sent, XOR is performed with the sequence generated by the scrambler, and then sent out. The data sent at this time is the scrambled data. The receiving circuit uses the same polynomial as the sending circuit, so that the descrambler can restore the original user data at the sending end. (Note: XOR with the same number twice in a row, the final result is itself)

The above content comes from "Verilog Advanced Digital System Design Technology and Example Analysis"

Digital IC front-end study notes: LSFR (Linear Feedback Shift Register)

related articles

introduction

Fibonacci LSFR and Galois LSFR

Usage of LFSR

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