EDITORIAL words
Here dreams wing brothers want to specially emphasize Modelsim software, then this software in the end is to do what? Here, I ask you a question, suppose we have a piece of hardware board design is completed, do not know the function is normal, then we need to how to do it ? The answer is a simple matter, is what we call the "test", to the electric circuit board after a certain input excitation test, observe the board what kind of output, if the output and input stimulus correspondence is correct, Description of the circuit board is no problem, on the contrary, if the circuit board has a problem, in this way, we can determine which part finally a problem.
Test hardware board so, we test code logic naturally the same reason. We wrote a hardware description language, after the code is written, you can achieve the equivalent to a hardware circuit blocks within the FPGA chip, then the circuit block is able to work according to our expectations of it? We also need him to be tested. Of course, the test here is not referring to a pile of wires, power lines connected together to form a dense network to do tests and, if so, to dream of a senior intelligence wing, the estimated long dry do not go on it!
Now the mainstream electronic design automation is not it? Modelsim is such a wonderful piece of software, we just need to be simple programming, you can simulate a variety of input complex signals in real environments, using the display window interface and software, we can easily see all of our code logic changes in the level of the signal line can help us quickly locate the problem.
Quartus II and used in conjunction Modelsin
According to the steps in the previous section, we have installed the necessary software development tools QuartusII 15.0 and simulation tool Modelsim. However, these two tools on how to use it? In this section, the dream-wing brothers through a very simple counter project to teach you commonly use two tools.
First, create a new folder and name a meaningful English words (Note: the path where the file can not contain any of the characters or Chinese characters)
Then close the folder, and double-click to open the Quartus software on the desktop
Click File-> New Project Wizard option to create a new project, the following interface
Click [ Next]
Then choose the path where the project as follows
To the project named as follows (recommended: the best project name and folder names consistent)
Click [Next]
Click [Next]
On top of this interface is to allow us to add an existing file has been written, because we have no written documents, so ignore this step, click on [ Next]
Under the current interface, we can choose the specific model they are using the chip, dream-wing brothers one is chosen as follows:
Click [Next]
Select simulation tools and languages are as follows
Click [Next], appears set our engineering report
Click [Finish] to exit to complete the project established
Through the above steps, a new project has been constructed, then if you want to enter the code, we need to create a text editor.
Click File-> New The following dialog box appears
Click [ Verilog HDL File ], create a Verilog text editor, after select and click [OK]
Next, we can enter our code in this white editing interface
After the coding is completed we need to compile it, check for syntax errors. Shortcuts compiled two [ ctrl + L ] and [ ctrl + K ]. [ Ctrl + L ] refers to the whole compilation, the software will not only check the syntax of the code, while also layout, mapping the code into a specific circuit netlist, if we need to download code to the development board must be carried out before downloading a full compile, compile the whole time is relatively long. [ Ctrl + K ] means that the average compiler, just check the syntax error, the compiler is faster. Here, the dream click wing brothers [ ctrl + L], after compiling the following results:
The interface is shown in Fig resource report, after the end of the compiler, the software will tell the user the use of internal chip resources . Report bar prompts on the bottom side of the "EDA Netlist Writer was successful", and did not give a red error report shows that our code is syntactically correct.
Just said, that we can only compile grammar is no problem, then the logic of it? We want the function can be achieved? This is not known, after all, the software does not know our ultimate goal. Therefore, we must resort to another tool Modelsim simulation, see the specific logic is correct the waveform.
So how can you simulate it? We simulated may be understood as the process we usually test circuit board, is input to the unit under test must observe how it has several outputs and what the process. Therefore, the call before Modelsim, we need to write a test stimulus, to test the module input test stimuli. Now writing test code as follows:
After the completion of the preparation of test code, we first need some software settings. As shown, right-click the project name "counter" in the following figure
Select "Settings", the following interface
Click to select "Compile test bench"
Click [Test Benchs ...]
Click [New]
Enter the test module file name as follows
In the "File name" Click on this measure [...]
Select tb.v file
Click [Open]
Click [Add]
Click [OK]
Click [OK]
Click [ OK] to exit the settings. Through the above steps, Modelsim and Quartus cascaded setup is complete. Return Quartus interface is as follows
Select Tools-> Run Simulation Tool-> RTL Simulation
Appears after clicking the following Modelsim interface
Click the stop button to stop the current wave off
Then [ctrl + A] to select all of the signals
Delet key on the keyboard, deleting all waveform
In the "sim" and right-click on the toolbar, select the counter
Next select [ Add Wave] ( Note: In this way, we can see all of the input and output variables and internal variables in the waveform )
Click on "Toggle leaf names <-> full names"
Click [ctrl + G] to implement automatic grouping
Right name of the selected signal
Select an unsigned data types in the [Radix] option, change the display binary signal ( Note: you can choose other display hex needed )
Click [ ctrl + S] to save the waveform
Click [OK] to confirm saving
Subsequently, in the command window ( the Transcript) entering the restart command
Click on "Enter key" to confirm, the following dialog box
Continue to click "Enter key"
Next, in the command window "run 0.1ms" (Note: the specific time can be customized )
Continue to click "Enter key" to confirm
WAVE interface with a mouse click
Can be reduced or enlarged by the toolbar above waveform, the waveform can be viewed at any position
Through the above process, we completed the Quartus Modelsim joint design and commissioning process, we learn after this operation are based on a dream-wing brothers here suggest that you must engage in active practice, to master the basic usage of good software.