FPGA study notes_Quartus II_In system sources and probes editor (ISSP) debugging tool use

FPGA study notes

Quartus II prime Standard Edition—In system sources and probes editor (ISSP) debugging tool use

The old version of Quartus II and the new version of the In system sources and probes editor (ISSP) debugging tools use different methods. The following is the calling method of the Quartus II prime Standard Edition, for reference only.

1. As shown in the figure below, click IP Catalog in assignmen, enter In system sources and probes, and double-click Altera In-system Source &Probes
   

2. Fill in the name and path, click ok
   

3. Fill in the values ​​of probes and source, click finish
   
   Probe: probe, grab the value of the internal signal of the module, and observe the value of the internal signal of the module on the computer in real time.
   Sources: drive source, connected to some registers of the module to be tested, through the computer If a value is provided above, this value will be written into the register of the board in real time; by driving a register, you can observe the response of other modules

4. Click close
   

5. Select verilog, set the storage path, click generate, finish, ok
   
   

6. Add the generated file to the project file, right click on the file, click add/remove files in project, add the .v file to the project
   
   

7. The addition is successful and can be used for the next step of instantiation

[Note]: Personal study notes, if there are any mistakes, please feel free to enlighten me. This is polite~~~