The figure below shows the 6 on-chip debugging tools provided by the quartusii handbook, listing their respective uses.
Among them, SignalProbe is a tool provided by Quartus ii to detect the internal signals of the FPGA through external devices, that is, connect the signals that need to be detected inside the FPGA to the unused IO pin output, so that the external tools such as an oscilloscope can be used to observe the Signal situation. Compared with setting the output pin directly in the project, SignalProbe will not change the original design, but only uses extra pins to output signals.
SignalProbe usage conditions:
(1) There are redundant IO pins;
(2) The target device is FPGA or CPLD;
(3) There are external test equipment, such as logic analyzers and oscilloscopes.
Advantages of SignalProbe:
(1) Short compile time;
(2) Does not change the layout of the original project;
(3) Does not require JTAG;
(4) Even if the internal logic resources are very small, it can be used (in this case, use other debugging tools such as signaltapii Waiting will lead to insufficient resources).
The following describes the operation steps of SignalProbe. In the following example, I use SignalProbe to observe the internal signal cnt[0]
1. New project, quartusii 13.1 device EP4CE115F29C8
2. Fully compile the project
3. Open SignalProbe
Tools->SignalProbe Pins
Pop up the SignalProbe Pins window
Click the Add... button, and the Add SignalProbe Pin dialog box pops up (you can add multiple signals that need to be detected)
4. Add SignalProbe Pin and set as shown in the figure below.
Source node name: Click the… button in the red box 1 to add the node signal to be detected. Here I choose cnt[0]
Pin location: Red box 2 select the output pin to be connected to the detected node signal, select PIN_A10
SignalProbe pin name: give the SignalProbe pin a name, the default can be
Pipeline registers: set the output signal Do you need to increase the pipeline register? 0 means no register is needed.
Click the OK button in the red box 3 to complete the setting.
5. Click the Start check button to generate SignalProbe. When the progress bar next to it is 100%, it indicates successful completion.
6. Click the Close button to exit
7. In the Fitter->SignalProbe Fitting Results of the compilation result, you can see the new SignalProbe information
8、查看 Technology Map Viewer
Tools->Netlist Viewers->Technology Map Viewer(Posting-Fitting)
In the test->Ports->Output->select cnt[0]_signalProbe on the left side of the figure below, you can see the added probe pins in the figure on the right.
9. Download the .sof to the target device via JTAG, and then we can detect the output pin signal (PIN_A10) we set through the external device.