Order classification
| name | Zero address instruction | Address instruction | Two address instruction | Three address instruction | Four address instructions |
|---|---|---|---|---|---|
| Calculation formula | ON (A1) -> (A1) | (ACC) OP(A1)->(ACC) or OP(A1)->A1 | (A1) ON (A2) -> A2 | (A1) ON (A2) -> A3 | (A1)OP(A2)->A3,A4=The address of the next instruction to be executed |
| Operation type | No operation instructions, stop instructions, close interrupt instructions, pop-up and push-in of zero-address arithmetic instructions in stack computers | Single-address instruction with only destination operand (add 1, subtract 1, negate, complement)//dual-operand instruction with implicit destination address (usually provided by accumulator ACC) | Add, subtract, multiply and divide various arithmetic operations | —— | —— |
| Addressing range | —— | 2 to the 24th power (16M) | 2 to the 12th power (12K) | 256 (8th power) | 64 (6th power) |
Follow-up to add
https://blog.csdn.net/mmphhh/article/details/101167756 (describe the number of memory accesses)