Principles of Computer Composition (2.1)--System Bus

Table of contents

First, the basic knowledge of the bus

1. Bus

2. Information transmission on the bus

3. Scattered Connection Graph 

4. Note 

2. Example of computer with bus structure 

1. CPU-oriented dual-bus structure block diagram

2. Single bus structure block diagram

3. Memory-centric dual-bus structure block diagram

Three, the classification of the bus 

1. On-chip bus

2. System bus (board-level bus or inter-board bus)

2.1 Data bus

2.2 Address bus

2.3 Control bus

3. Communication bus 

4. Bus characteristics and performance indicators

1. Physical implementation of the bus

2. Bus characteristics

2.1 Mechanical properties

 2.2 Electrical characteristics

2.3 Features

 2.4 Temporal characteristics

3. Performance indicators of the bus

4. Bus standard 


First, the basic knowledge of the bus

1. Bus

Bus (distributed connection): An information transmission line that connects multiple components, and is a transmission medium shared by all components.

Scattered connections: Use separate wires between components

2. Information transmission on the bus

Transmission of information on the bus: serial and parallel

serial
serial
parallel

3. Scattered Connection Graph 

Distributed connection 1

Distributed connection 2

4. Note 

(1) When two or more components send information to the bus at the same time, it will cause signal conflict and the transmission will be invalid. At a time, only one component is allowed to send information to the bus.

(2) Multiple components can receive the same information from the bus at the same time.

(3) The bus is actually composed of many transmission lines or paths.

2. Example of computer with bus structure 

1. CPU-oriented dual-bus structure block diagram

CPU-oriented dual-bus architecture block diagram

2. Single bus structure block diagram

Single bus structure block diagram

3. Memory-centric dual-bus structure block diagram

Memory-centric dual-bus architecture block diagram

Three, the classification of the bus 

According to data transmission mode: parallel transmission bus, serial transmission bus

According to the scope of use computer bus, measurement and control bus, network communication bus

Classified by connecting parts: on-chip bus, system bus, communication bus

1. On-chip bus

The on-chip bus refers to the bus inside the chip . For example, in the CPU chip, registers and registers, registers and
ALU are all connected by the on-chip bus.

2. System bus ( board-level bus or inter-board bus )

 According to the different information transmitted by the system bus, it can be divided into three categories: data bus, address bus and control bus

2.1 Data bus

The data bus is used to transmit data information between functional components. It is a two-way transmission bus . The number of bits is related to the length of the machine word and the length of
the storage word . Generally, it is 16 bits or 32 bits. The number of bits of the data bus is called the data bus width , which is an important parameter to measure the performance of the system.

If the width of the data bus is 8 bits and the instruction word length is 16 bits, then the CPU must access the main memory twice during the instruction fetch phase.

2.2 Address bus

The address bus is mainly used to indicate  the address of the source data or destination data on the data bus in the main memory unit or the address of the I/O device.

The code on the address bus is used to indicate the address of the storage unit or 1/0 port that the CPU wants to access, and is output by the CPU for one-way transmission.

Related to storage address, I/O address

The number of bits of the address line is related to the number of storage units, if there are 20 address lines, the corresponding number of storage units is 2^20

2.3 Control bus

Since the data bus and address bus are shared by all the components on the bus, how to enable each component to occupy the
right to use the bus at different times depends on the control bus, so the control bus is used to send various control signals transmission line.

Control signals are both output and input .

Output: memory read, memory write bus enable, interrupt acknowledge

Input: interrupt request, bus request

Common control signals are as follows:

   clock
   Reset
   Bus request
   The bus allows
   Interrupt request
   Interrupt response
   Memory write
   Memory read
   I/O copy
   I/O notes

3. Communication bus 


This type of bus is used for communication between computer systems or between computer systems and other systems (such as control instruments, mobile communications, etc.) .

According to the transmission mode, it can be divided into two types: serial communication and parallel communication.

4. Bus characteristics and performance indicators

1. Physical implementation of the bus

2. Bus characteristics

2.1 Mechanical properties

Mechanical characteristics refer to some performances of the bus in terms of mechanical connection, such as the standards used by plugs and sockets, their geometric dimensions
, shapes, number of pins and the order of arrangement, reliable contact at the joints , etc. 

 2.2 Electrical characteristics

Electrical characteristics refer to the transmission direction and effective level range of signals on each transmission line of the bus . It is usually stipulated
that the signal sent by the CPU is called the output signal, and the signal sent to the CPU is called the input signal.

2.3 Features

Functional characteristics refer to the function of each transmission line in the bus . For example, the address bus is used to indicate the address code; the data bus is used to transmit
data ; the control bus sends control signals , both from the CPU, such as memory read/write, 1 /0 device read/write, there are also 1/0 devices sent to the CPU, such as interrupt requests, DMA requests, etc. It can be seen that the functions of each line are different.

 2.4 Temporal characteristics

The time characteristic refers to when any line in the bus is valid. Various signals on each bus have an
effective timing relationship with each other , so the time characteristics can generally be described by a signal timing diagram.

3. Performance indicators of the bus

①Bus width: usually refers to the number of data buses, represented by bit (bit), such as 8 bits, 16 bits, 32 bits, 64 bits (ie 8, 16, 32, 64).
②Bus bandwidth: Bus bandwidth can be understood as the data transmission rate of the bus, that is, the number of bits of data transmitted on the bus per unit time, usually measured by the number of bytes of information transmitted per second, and the unit can be MBps (megabytes per second) express. For example, if the operating frequency of the bus is 33 MHz and the bus width is 32 (4 B), then the bus bandwidth is 33x(32+8)=132 MBps ③
Clock synchronous/asynchronous: A bus whose data on the bus works synchronously with the clock is called synchronous A bus that works asynchronously with a clock
is called an asynchronous bus .
④Bus multiplexing: two signals are transmitted on one signal line in time division. For example, usually the address bus and the data bus are two physically
separate buses, the address bus transmits address codes, and the data bus transmits data information. In order to improve the utilization rate of the bus and optimize the design, the address bus and the data bus share a set of physical lines, and the address signals and data signals are time-divisionally transmitted on this set of physical lines, which is the multiplexing of the bus.
⑤ Number of signal lines: the sum of the three bus numbers of address bus, data bus and control bus.
⑥Bus control mode: including burst work, automatic configuration, arbitration mode, logic mode, counting mode, etc.
⑦ Other indicators: such as load capacity, power supply voltage (whether 5V or 3.3 V is used), whether the bus width can be expanded, etc.

4. Bus standard 

ISA

EISA

VESA(LV-BUS)

PCI

AGP

RS-232

USB

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Origin blog.csdn.net/weixin_53197693/article/details/129274814