1. CPU structure (composition of arithmetic unit and controller)
The CPU consists of an arithmetic unit and a controller
2. Arithmetic unit (ALU)
Includes: Accumulation Register (AC) and Program Status Register (PSW)
2.1 Accumulation register (AC)
A register dedicated to storing an operand and the result of an arithmetic or logical operation.
The accumulation register (AC) can perform operations such as addition, subtraction, reading, shifting, and complementing.
The accumulation register (AC) is the main part of the arithmetic unit.
2.2 Program Status Register (PSW)
This part is used to store two types of information
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One is various state information (condition code) that reflects the execution result of the current instruction,
such as whether there is a carry, whether there is overflow, whether the result is positive or negative, whether the information is zero, etc.; -
The other is to store control information
such as enabling interrupts, trace flags, etc.
3. Controller
Including: program counter (PC), instruction register (IR), instruction decoder, timing components
3.1 Program Counter (PC)
The program counter stores the address of the next instruction.
Since programs are executed sequentially in most cases, the program counter is designed as a device that automatically increments by one.
When a branch instruction occurs, the program counter needs to be refilled
3.2 Instruction Register (IR)
The opcode table being executed by the CPU is stored here, that is, all instructions currently being executed
3.3 Instruction Decoder
Decoding the opcode tells the CPU what to do.
3.4 Timing components
Note:
The addressing mode of the CPU has multiple addressing modes besides direct addressing, the purpose is to find a balance between efficiency and convenience. The CPU
distinguishes between different stages of the instruction cycle and stores them in binary code Instructions and data
· Instructions are first entered into the data registers for temporary storage, and then get into the instruction registers, and then handed over to the instruction decoder for decoding and operation (handed over to the arithmetic unit), and once this process is over, it will be The instruction in the program counter (that is, the next instruction) will be quickly extracted, so the "address" of the next instruction is always stored in the program counter;