First, the composition I2C serial bus and works

PHLIPS I2C bus is a serial bus introduced, it has only two bidirectional signal lines. A data line SDA (serial data), the other clock line is the SCL
(Serial Clock). Can be linked to multiple devices, each device has a unique address. Communicate using the master from the slave link active mode, the host, then the slave passive response data.
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I2C bus via pull-up resistors connected to the positive supply. When the bus is idle, two lines are high. A low level of any output device on the bus, the bus will make the signal becomes low,
i.e., SDA and SCL lines of each device is the relationship "and."

Two, I2C bus transfer protocol

A total of five I2C communication sequence comprising: initiation, termination, response, sending (writing) and receive (read), which are determined by five timing pulses of different combinations.

The validity of the data bits:

SCL is high, SDA must be stable;
SCL is low, SDA allowed state changes.
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Start / End Timing:

SCL is high, SDA start signal indicates a change from high to low;
SCL is high, SDA represents a stop signal changes from low to high.
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Acknowledge sequence:

8 bits per byte, the most significant bit transmitted first, followed by an acknowledge bit (i.e., 9 a)
Acknowledge Bit: respond with "0" from the machine is idle, busy slave issuing non-responder "1";
when the host end termination signal should be issued to continue transmitting data acknowledge bit sent by the host from the slave machine determines whether the data is successfully received.
(* The acknowledge bit is sent to the slave, data from master to slave)
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Send (write) Timing:

+ Data line start signal from the address (7 bits) + data transfer direction bit (R & lt / T =. 1/0)
"0" indicates that the master transmits data (T), "1" indicates that the master receives data (R).
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About Slave Address: AT24C02 here for an example, A0A1A2 to the input address (i.e., 2 ^ 3 can be hung I2C = 8 from the machine).
When A0 = A1 = A2 = 0, address 1010 0000 = 0xa0.

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Receiving (Read) Timing:

The same start-up mode read and write operations. There are three read operations: current address read, and the read address reading random order.
+ Data line start signal from the address (7 bits) + data transfer direction bit (R & lt / T =. 1/0)
"0" indicates that the master transmits data (T), "1" indicates that the master receives data (R).
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Simulated I2C communication:

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Above, it

I2C start timing program

void I2C_Start()
{
	SCL = 1;
	_nop_(); //空操作，占一个机器周期1.08506
	SDA = 1;
	delay_5us();
	SDA = 0;
	delay_5us();
}

I2C termination sequence program

void I2C_Stop()
{
	SDA = 0;
	_nop_();
	SCL = 1;
	delay_5us();
	SDA = 1;
	delay_5us();
}

Host detected from the machine answers

bit Test_ACK()
{
	SCL =  1;	//在时钟总线为高电平期间可以读取应答信号
	delay_5us();
	if (SDA)
	{
		SCL = 0;
		I2C_Stop();
		return(0);
	}
	else
	{
		SCL = 0;
		return(1);
	}
}

The host sends a response

void Master_ACK(bit i)
{
	SCL = 0;
	_nop_();
	if (i)
	{
		SDA = 0;
	}
	else
	{
		SDA = 1;
	}
	_nop_();
	SCL = 1;//数据保持稳定
	_nop_();
	SCL = 0;
	_nop_();
	SDA = 1;
	_nop_();
}