Table of contents
I2C communication protocol
hardware
In order to avoid power short circuit caused by improper bus coordination, it is configured as an open-drain output. All devices output low level but not high level, as shown in the picture on the right. In order to avoid floating caused by high level, (third point) the bus is connected to an external pull-up resistor (weak pull-up)
Benefits: 1. Avoid short circuit problems;
2. Avoid frequent switching of pin modes. Open drain + weak pull-up is both input and output. Outputting a high level in open-drain mode is equivalent to disconnecting the pin. Before the input mode, a high level can be output;
3. There will be a "wired AND" phenomenon in this mode. One or more devices output low level and the bus is low level. All are high level before they are at high level. It can be used for clock synchronization and bus arbitration in multi-master mode. .
The GPIO port here must be configured as a multiplexed open-drain output. Multiplexing, the status of the GPIO port is controlled by on-chip peripherals
Start, slave address, response, data 1, response, data 2, response.
Current address reading
software
When there is one master and multiple slaves, the start and end are generated by the master and are not allowed by the slaves.
Here, the high position goes first, and the serial port goes first.
The host pulls SCL low to put data on the SDA line, and releases SCL and the slave reads the data on SDA.
SCL low level slave puts data, high level host reads data (the solid line is the host control, the dotted line is the slave)
Send reply/receive reply
I2C timing
After reading and writing, the address pointer will +1. At the same time, pay attention to the response
Specify the address and write: reg address (register address)
Start Repeat Start Stop
MPU6050 (see the two manuals for details)
3.3V voltage regulator
107 Power management register 1 must be released from sleep before operating, otherwise operating other registers will be invalid.
