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Steps of I2C Data Transmission
Single master with multiple slaves
Multiple masters with multiple slaves
Advantages and disadvantages of I2C
I2C bus protocol overview
The I2C bus is widely used in projects for OLED displays, barometric pressure sensors or gyroscope/accelerometer modules.
I2C combines the best features of SPI and UART. Using I2C, it is possible to connect multiple slaves to a single master (like SPI) and have multiple masters control a single or multiple slaves. This is useful when you want to have multiple microcontrollers logging data to a single memory card or displaying text to a single LCD.
Like UART communication, I2C uses only two wires to transfer data between devices:
SDA (Serial Data) : The line on which the master and slave send and receive data.
SCL (Serial Clock) : The line that transmits the clock signal.
I2C is a serial communication protocol, so data is transferred bit by bit along a single wire (SDA line).
Like SPI, I2C is synchronous, so the output of the bits is synchronized with the bit sampling by a clock signal shared between the master and slave. The clock signal is always controlled by the master .
Parameter summary
| number of lines required |
2 |
| maximum rate |
Standard Mode: 100kbps Fast Mode: 400kbps High Speed Mode: 3.4Mbps Speed Mode: 5Mbps |
| synchronous or asynchronous |
Synchronize |
| serial or parallel |
serial |
| Maximum number of hosts |
no limit |
| Maximum number of slaves |
1008 |
How I2C Works
With I2C, data is transferred in messages. Messages are broken up into data frames. Each message has an address frame containing the binary address of the slave, and one or more data frames containing the data being transferred. The message also includes start and stop conditions, read/write bits, and ACK/NACK bits between each data frame:
Start Condition : The SDA line transitions from high to low before the SCL line transitions from high to low.
Stop condition : After the SCL line switches from low to high, the SDA line switches from low to high.
Address Frame : A 7-bit or 10-bit sequence unique to each slave that identifies the slave when the master wants to communicate with it.
Read/Write Bit : A single bit that specifies whether the master sends data to the slave (low) or requests data from it (high).
ACK/NACK bit: Each frame in the message is followed by an ack/no ack bit. If the address frame or data frame is successfully received, an ACK bit is returned from the receiver to the sender.
addressing
I2C doesn't have a slave select line like SPI does, so it needs another way to let the slave know that data is being sent to it, not another slave station. It does this by addressing. The address frame is always the first frame after the start bit in a new message.
The master sends the address of the slave it wants to communicate with to every slave connected to it. Each slave then compares the address sent from the master with its own address. If the addresses match, a low ACK bit is sent back to the host. If the addresses do not match, the slave does nothing and the SDA line remains high.
read/write bit
The address frame contains a bit at the end that informs the slave whether data is to be written to or read from. If the master wants to write data to the slave, the read/write bit is low. This bit is high if the master reads data from the slave.
Data Frame
After the master detects the ACK bit from the slave, the first data frame can be sent.
The length of the data frame is always 8 bits, and the most significant bit is sent first. Each data frame is followed by an ACK/NACK bit to verify that the frame was successfully received. Before sending the next data frame, the ACK bit must be received by either the master or the slave (depending on who sent the data).
After all data frames have been sent, the master can send a stop condition to the slave to stop the transfer. A stop condition is a low-to-high voltage transition on the SDA line following a low-to-high voltage transition on the SCL line, while the SCL line remains high.
Steps of I2C Data Transmission
1. The master toggles the START condition from high to low, toggles the SDA line from high to low, and sends the START condition to each connected slave:
2. The master sends each slave the 7-bit or 10-bit address of the slave it wants to communicate with, along with the read/write bits:
3. Each slave compares the address sent by the master with its own address. If the addresses match, the slave returns the ACK bit by pulling the SDA line one bit low. If the address from the master does not match the slave's own address, the slave holds the SDA line high.
4. The host sends or receives data frames:
5. After each data frame is transmitted, the receiver returns another ACK bit to the sender to confirm successful frame reception:
6. To stop the data transfer, the master sends a stop condition to the slave by toggling SCL high before switching SDA high:
Single master with multiple slaves
Since I2C uses addressing, multiple slaves can be controlled from a single master. For 7-bit addresses, 128 (2^7) unique addresses can be used. The use of 10-bit addresses is uncommon, but provides 1,024 (2^10) unique addresses. To connect multiple slaves to a single master, connect them like this, using 4.7KΩ pull-up resistors to connect the SDA and SCL lines to Vcc:
Multiple masters with multiple slaves
Multiple masters can be connected to a single slave or to multiple slaves. The problem of multiple hosts in the same system arises when two hosts try to send or receive data simultaneously over the SDA line. To solve this problem, each host needs to detect whether the SDA line is low or high before transmitting a message. If the SDA line is low, it means another master is controlling the bus and the master should wait to send a message. If the SDA line is high, the message is safe to transmit. To connect multiple masters to multiple slaves, connect them like this, using 4.7KΩ pull-up resistors to connect the SDA and SCL lines to Vcc:
Advantages and disadvantages of I2C
advantage
- Use only two wires
- Supports multiple masters and multiple slaves
- ACK/NACK bits confirm that each frame was successfully transmitted
- Hardware is simpler than UART
- Well-known and widely used protocols
shortcoming
- Data transfer rate is slower than SPI
- The size of the data frame is limited to 8 bits
- Need to implement more complex hardware than SPI
Summary of common buses
[Bus] One article to understand the UART communication protocol