I2C communication protocol detailed

Two aspects

I do not know I was not there this case, after completion of STM32, learned a lonely feeling.

Gangster say listen do not understand, so a wave of in-depth review to find out the principles
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say today is that I2C communication protocols, not just learning to know is doing with these agreements, only to find understanding, shall not die, like on OLED mpu6050 EEPROM Bala Bala Bala. . . In short, it is very common. Well, nonsense finished.
We two ways to introduce the I2C protocol
1-> Physical Layer
2-> protocol layer

Electrical characteristics of the physical layer

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1: It is a bus that supports multiple devices, meaning that the bus signal lines common to the plurality of devices, a plurality of bus devices can be mounted.

2: comprising two buses, i.e., serial clock line (SCL) C clock means is representative of a clock, and a serial data line (SDA) D Data is representative of the meaning of the data. As the name suggests, the SDA used to transmit data, while SCL remains transceiver for synchronization.

3: can mount multiple devices on the I2C bus, it is how to identify the machine from which to send it? ** In fact, every device on the I2C bus has its own address, to ensure the accuracy of access between different devices. ** address may be 7 or 11 bits.

4: a bus to a power supply via the pullup resistor. This may be a lot of people do not understand, I explain in detail about the shining figure above. In the logic of the computer:
high voltage represents a (high impedance)
voltage represents 0
when the output device is idle or 1, but not the high output impedance state we!
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High-impedance state, by definition Well, the resistance is large, then takes infinity myself.
When the idle state represents : Suppose FIG output voltage is zero when the touch screen is idle, the SCL bus will be pulled low at this time if the sensor is working, a high level output, the touch screen is 0V in this case, the sensor is high, it will causing a short circuit. If we have a high impedance to the touch screen, the equivalent circuit. At this point we make the sensor voltage is high, then the entire SCL bus was pushed up.

When a high level indicative **: ** assuming that other equipment idle (high impedance state), it can be ignored, only the operation of the sensor if the high impedance state, and because the presence of the pull-up resistor, the entire line SCL is 1.

5: having three transmission modes: standard mode transmission rate of 100kbit / s, the fast mode is 400kbit / s, up to 3.4Mbit / s high-speed mode, but most of the current I 2C devices not support high-speed mode. We generally use the standard mode on it.

6: is connected to the bus by the same number of IC 400pF capacitance limits the maximum bus.
PS: purely forced open, never learned the circuit

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Protocol layers

I2C protocol defines the start and stop signals, data validation, response, arbitration, clock synchronization and broadcast address other aspects of communication. To express the state of various signals via the bus.

I2C

I2C basic literacy course

First put a picture:
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# Writing process

First do not understand how specific signal generated by the first to abstract understanding of it, take it to write:
hosts say first start transmitting (S), where it transmitted? ? It is clear that the slave of (ADRESS), the host once again confirmed that reading someone else data or write data to it (R / W), then the slave expressed know you want to read / write (A), the host sends data Bala Bala Bala, send Upon completion, the machine said they did not accept data from a (non-responder that symbol will not play). the host then stop writing data (P).
--------------------------------------- forgive my writing, really touching. ----------------------------------------------
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S: indicates the start of transmission, to say the beginning.
SLAVE_ADDRESS: this figure also said, that the slave address
R & lt / W is: 0 is written, the read 1
DATA: data sent
A: response signal
P: stop signal. ended

Communications composite format

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This process is actually the process of writing and speaking in front of almost assume that the first R / W is written, then the host to generate a start signal, find the slave address, began to write, the slave acknowledges, this time behind this is to represent DATA write address from the machine, such as EEPROM, where it is written, is determined by the DATA, and behind it are almost no long-winded.

Judging communication signals

Start and stop signals to communicate

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1 when the SCL is high, the SDA from high to low, indicating a start signal
2 when the SCL is high, the SDA from low to high, indicating that the stop signal

Data Validation

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1: when the SCL is high, if SDA is high, data indicating the 1, if SDA is low, data indicative of 0. The
2 when the SCL is low, SDA level conversion, indicates a data transmission.

Address and data direction

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Speaking in front of our address is 7 or 10, usually with seven.
Eight device address = 7 after the slave address + read / write address to EEPROM, for example, his seven device address is 1111000 hex conversion is 0x78
read address eight devices = 1111 0001 = 0xF1
eight write the address of the device = 1111 0000 = 0xF0

In response signal

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During transfer, the master generates the clock, produced at the 9th clock (8 clock 8 bytes, wear lose a bit (byte) a)
data transmission terminal will relinquish control of the SDA, into data receiving end controlling the SDA, at this time if the response is low compared with the high level non-response

Communication process

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Here is not to say, look here in front of complete understanding very relaxed, and to read and write the above process is basically the same. Here Insert Picture Description
Special needs to say is the following EV5, EV6 and the like, in fact, the following represents the state, such as generating a start signal, there will be a corresponding event occurs, if at this time we can detect the status register (want to know participate "STM32 Chinese reference Manual"), if it detects an event occurs, it is determined that the start signal is generated, it can be considered a guarantee.

Explain part of the code

#include "myiic.h"
#include "delay.h"
 

void IIC_Init(void)
{					     
	GPIO_InitTypeDef GPIO_InitStructure;
	RCC_APB2PeriphClockCmd(	RCC_APB2Periph_GPIOB, ENABLE );	
	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6|GPIO_Pin_7;
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP ;   
	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
	GPIO_Init(GPIOB, &GPIO_InitStructure);
	GPIO_SetBits(GPIOB,GPIO_Pin_6|GPIO_Pin_7); 	
}

void IIC_Start(void)
{
	SDA_OUT();     //sdaÏßÊä³ö
	IIC_SDA=1;	  	  
	IIC_SCL=1;
	delay_us(4);
 	IIC_SDA=0;//START:when CLK is high,DATA change form high to low 
	delay_us(4);
	IIC_SCL=0;
}	  
//²úÉúIICÍ£Ö¹ÐźÅ
void IIC_Stop(void)
{
	SDA_OUT();//sdaÏßÊä³ö
	IIC_SCL=0;
	IIC_SDA=0;//STOP:when CLK is high DATA change form low to high
 	delay_us(4);
	IIC_SCL=1; 
	IIC_SDA=1;
	delay_us(4);							   	
}

u8 IIC_Wait_Ack(void)
{
	u8 ucErrTime=0;
	SDA_IN();    
	IIC_SDA=1;delay_us(1);	   
	IIC_SCL=1;delay_us(1);	 
	while(READ_SDA)
	{
		ucErrTime++;
		if(ucErrTime>250)
		{
			IIC_Stop();
			return 1;
		}
	}
	IIC_SCL=0;//ʱÖÓÊä³ö0 	   
	return 0;  
} 

void IIC_Ack(void)
{
	IIC_SCL=0;
	SDA_OUT();
	IIC_SDA=0;
	delay_us(2);
	IIC_SCL=1;
	delay_us(2);
	IIC_SCL=0;
}
    
void IIC_NAck(void)
{
	IIC_SCL=0;
	SDA_OUT();
	IIC_SDA=1;
	delay_us(2);
	IIC_SCL=1;
	delay_us(2);
	IIC_SCL=0;
}					 				     
	  




IIC_Start (); start signal
IIC_Stop (); stop signal
IIC_Wait_Ack (); waits for a response
IIC_Ack () response signal
IIC_NAck not acknowledge
the timing chart of the foregoing it will be appreciated;

Focus on talk about sending and reading byte function :

void IIC_Send_Byte(u8 txd)
{                        
    u8 t;   
	SDA_OUT(); 	    
    IIC_SCL=0;//À­µÍʱÖÓ¿ªÊ¼Êý¾Ý´«Êä
    for(t=0;t<8;t++)
    {              
        IIC_SDA=(txd&0x80)>>7;
        txd<<=1; 	  
		delay_us(2);   //¶ÔTEA5767ÕâÈý¸öÑÓʱ¶¼ÊDZØÐëµÄ
		IIC_SCL=1;
		delay_us(2); 
		IIC_SCL=0;	
		delay_us(2);
    }	 
} 	    
//¶Á1¸ö×Ö½Ú£¬ack=1ʱ£¬·¢ËÍACK£¬ack=0£¬·¢ËÍnACK   
u8 IIC_Read_Byte(unsigned char ack)
{
	unsigned char i,receive=0;
	SDA_IN();//SDAÉèÖÃΪÊäÈë
    for(i=0;i<8;i++ )
	{
        IIC_SCL=0; 
        delay_us(2);
		IIC_SCL=1;
        receive<<=1;
        if(READ_SDA)receive++;   
		delay_us(1); 
    }					 
    if (!ack)
        IIC_NAck();//·¢ËÍnACK
    else
        IIC_Ack(); //·¢ËÍACK   
    return receive;
}

Look transmission data txd of data to be transmitted, 0x80 is 1000 0000
If txd the first bit is 1, txd & 0x80 = 1000 0000
If txd first bit is 0 txd & 0x80 = 0000 0000 that the effect of operation is to extract txd highest data;
(txd & 0x80) >> 7 represents (txd & 0x80) right seven, assume that the data is 10 million zero right after the meeting is 000,000,001,
so that you get the highest data bit (eighth); the data left after order a shift, get the seventh cycle of data
Similarly to accept data.

to sum up

After the recent study found that communication is really important, a few days ago to do the experiment on the OLED and mpu6050, I2C communication protocols are used. ESP8266 protocol to connect to the cloud server should be used (MQTT). Oh sure to thoroughly understand the communication, or the late hard to learn.
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Understanding after completing most of these codes can be read, which I2C initialization or something like that I will not say ha, we are interested can use I2C communication protocol to communicate with the EEPROM.

If you learn it, the trouble Tell me what the point of a classic praise and then go, ball ball you.
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Way to find what played stm32 + ESP8266 + onenet chiefs

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Origin blog.csdn.net/xwwwj/article/details/105333223