I2C is the communication protocol I use most in actual projects. It only uses two wires (SDA and SCL) to transfer data between devices connected to the bus. Each device is identified by a unique address (whether it is MCU, external sensor, LCD driver, memory or keyboard interface), and can be used as a transmitter or receiver according to the function of the device. The LCD driver may be just a receiver, while the memory can send and receive data. In addition to the transmitter and receiver, the device can also act as a master or slave when transmitting data. The host is the device that initiates the data transmission and generates the clock signal. At that moment, any device that is addressed is a slave.
SDA and SCL signals
SDA and SCL are bidirectional lines, connected to a forward voltage through a current source or a pull-up resistor. When the bus is idle, both lines are high. The output stage of the device connected to the bus must be an OD (open drain) or OC (open collector) gate to perform the line and function. In the standard mode, the I2C bus The transmission data can reach the speed of 100kb/s, and reach the speed of 400kb/s in the fast mode, and the speed of 3.4Mb/s in the high-speed mode. The clock signal SCL is usually the responsibility of the host device.
Data validity
The data on the SDA line must be stable during the clock SCL is high. Only when the clock signal on the SCL line is low can the data line change its high and low state. Each data bit transfer requires a clock to be generated.
Start and termination conditions
All transmissions are started by a START(S) and terminated by a STOP§.
START condition is when SCL
is high, SDA goes from high to low, STOP condition is when SCL is high, SDA goes from low to high
The start condition and end condition are always generated by the host. After the start condition, the bus is in the busy state. After the termination condition, the bus is in the idle state after a fixed period of time. If there is no termination condition generated, but a repeated start condition (Sr), the bus is still busy. This In this case, S and Sr are the same in function. If the device connected to the bus contains the necessary interface hardware, it is easy to detect the start condition and the end condition. But the microcontroller without such an interface has a clock at each clock The SDA line must be sampled at least twice in the cycle to identify whether there is a level change.
The byte format of data transmission
must be 8 bits per byte sent to the SDA line. The number of bytes transmitted each time is unlimited. Each byte must be followed by an ACK response bit. The data is transmitted from the most significant bit (MSB). If the slave needs to perform some functions before it can receive or send new complete data, such as servicing an internal interrupt, then it The clock line SCL can be pulled low to force the master to enter the wait state. When the slave is ready for a new byte data transmission, the clock line SCL is released and the data transmission continues.
ACK and NACK
ACK occurs after each byte. The ACK response bit allows the receiver to notify the transmitter that the byte has been successfully received and the next byte can be sent. The host generates all clock pulses, including the 9th clock of the response bit Pulse. The
ACK response signal is defined as follows: in the 9th clock pulse of ACK, the transmitter releases the SDA line, so the receiver can pull SDA low, so that SDA is guaranteed to be low during the high level of this clock pulse .Setup and hold time should also be counted.
When SDA is still high during the 9th clock pulse, it is defined as a NACK signal. At this time, the host can generate a termination condition to terminate the transmission, or a repeated start condition to start a new transmission. There are 5 cases here Leading to the generation of NACK:
1. There is no receiver on the current transmission address of the bus, so no device responds with ACK.
2. Because the receiver is processing some real-time functions and is not yet ready to communicate with the host, the receiver cannot send and receive.
3. During the transmission, the receiver receives unrecognized data or commands.
4. During the transmission, the receiver cannot receive more data bytes.
5. The master-receiver should notify the slave-sender of the end of the transmission.