It is understood that there are actually three basic components of the AND gate or the NOT gate of the digital logic circuit, which are complementary CMOS logic, TTL logic and transmission gate logic. Among them, complementary CMOS logic has low power consumption. High process integration, simple implementation of combinational logic, and the ability to automatically generate arbitrary complex logic gates according to simple rules have great advantages in automation and are widely used.
The principle of CMOS, all " and logic" = NMOS in series, "or logic" = NMOS in parallel, PMOS is opposite and complementary , the generated NMOS and PMOS are complementary, that is, the output nodes in the two cases are connected together, and the inverter is added. can be achieved.
Designing is a typical defect that needs to be paid attention to: the drive capability of the pull-up path and the pull-down path caused by the unbalance of PMOS and NMOS is asymmetric, and the large and complex logic needs to be divided into small logic implementations, which will appear, and the pull-up or pull-down path is too long. , the problem of insufficient driving ability.
Full adder: an adder with carry input and output, a full adder with three inputs, two addends and a carry input, the output is the sum and carry to the high order D
Obtain the output expression according to the truth table, and then construct the corresponding digital circuit.
