Level 1: Half Adder Design
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The final answer for this level:
mission details
This task: Use the "Combination Logic Analysis" tool in Logisim to automatically generate a half adder circuit.
related information
The half adder circuit refers to the addition of two input binary data bits A、B(without carry input), and the output sum Sumand carry Coutare the addition operation circuit that realizes two one-bit binary numbers. The truth table is as follows:
A |
B |
Cout |
Sum |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
test introduction
Please open the circuit file (Adder.circ) with Notepad or other plain text editor, select all, copy, and paste it into the code window, click the "Evaluate" button at the bottom right, and the platform will test your code.
Level 2: Full Adder Design
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The final answer for this level:
mission details
This task: Please manually draw the full adder circuit in Logisim according to the full adder schematic diagram in the textbook.
related information
The full adder FA (Full Adder) is a combinational logic circuit that realizes the addition of two 1-bit binary numbers ( xi、yi) and the carry from the low order ( ci) to generate a sum ( si) and a carry output ( ). ci+1The truth table is as follows:
xi |
yi |
ci |
ci+1 |
si |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 |
| 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 1 |
The logical expression of the full adder is as follows: The s=∑m(1,2,4,7)=xi⊕yi⊕ci ci+1=∑m(3,5,6,7)=xiyi+xici+yici=xiyi+(xi⊕yi)cicircuit schematic diagram is as follows:
Experimental content
The experimental circuit framework is the same as the first level. Open the experimental circuit framework in Logisim, and draw the full adder circuit in the "hand-drawn full adder" subcircuit in the project.
Subcircuit Package Appearance
The appearance of the sub-circuit package is shown in the figure below, please do not change the pin position, otherwise the test cannot be completed!
test introduction
Please open the circuit file (Adder.circ) with Notepad or other plain text editor, select all, copy, and paste it into the code window, click the "Evaluate" button at the bottom right, and the platform will test your code.
common problem
Do not use the "Combination Logic Analysis" tool to automatically generate the circuit, otherwise the appearance of the circuit package will change and the online evaluation cannot be completed!
Level 3: Design of a Traveling-Wave Carry Adder
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The final answer for this level:
mission details
The task of this level: In Logisim, use the full adder FA designed in the previous level to design a 4-bit traveling-wave carry adder.
related information
The traveling wave carry means that the carry signal is transmitted from the low bit to the high bit, which is characterized by a simple structure, but a relatively slow speed. The schematic diagram is as follows:
Subcircuit Package Appearance
Do not move the pin position or the test will not be completed!
Experimental content
The experimental circuit framework is the same as the first level. Open the experimental circuit framework in Logisim, and use the full adder module cascade to design a 4-bit adder in the "4-bit traveling wave carry adder" subcircuit in the project.
test introduction
Please open the circuit file (Adder.circ) with Notepad or other plain text editor, select all, copy, and paste it into the code window, click the "Evaluate" button at the bottom right, and the platform will test your code.
Level 4: 1-digit decimal adder design
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The final answer for this level:
mission details
This level task: In Logisim, use the 4-bit adder of the previous level to design a 1-digit decimal number (8421BCD) adder circuit.
related information
BCD code addition principle
The schematic diagram of the addition of 1 decimal number (8421BCD code) is as follows:
Corrected logic design
Judgment that the result of the first addition Z is greater than 9: The simplified truth table is as follows:
expression:Adjust=Z4+Z3Z2+Z3Z1
Generating logic for correction value 0 or 6
The truth table is as follows:
expression:a3=a0=0;a2=a1=Adjust
Subcircuit Package Appearance
Do not move the pin position, otherwise the circuit test will not be completed!
Experimental content
The experimental circuit framework is the same as the first level. Open the experimental circuit framework in Logisim, and use the 4-bit adder and appropriate gate circuit to design and complete the 1-bit BCD code adder circuit in the "1-bit decimal adder" subcircuit in the project. This experiment uses the "Splitter" in the Wiring library! The use of comparators and multiplexers MUX is prohibited for this experiment !
Extended Design Suggestions
After completing the above experiments, you can try the multi-digit decimal adder design, the conversion circuit design from 8421 code to the remainder 3 code, etc. locally.
test introduction
Please open the circuit file (Adder.circ) with Notepad or other plain text editor, select all, copy, and paste it into the code window, click the "Evaluate" button at the bottom right, and the platform will test your code.