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1. What is a watchdog
1. What is a watchdog
In a microcomputer system composed of a single-chip microcomputer, the work of the single-chip microcomputer is often interfered by the external electromagnetic field , causing the program to run away and fall into an infinite loop, the normal operation of the program is interrupted, and the system controlled by the single-chip microcomputer cannot continue to work , It will cause the entire system to fall into a stagnant state and have unpredictable consequences . Therefore, for the consideration of real-time monitoring of the operating status of the single-chip microcomputer, a module or chip specially used to monitor the operating status of the single-chip microcomputer program has been produced , commonly known as **" Watchdog**.
2. The role of watchdog
When the program is running normally, the system will not reset.
When the program runs away, the watchdog will trigger a system reset and the program will be executed again .
3. Classification of watchdogs
STM32 has two built-in watchdogs ( independent watchdog/window watchdog ), which provides higher security, time accuracy and flexibility of use.
Both watchdog devices can be used to monitor and resolve faults caused by software errors.
When the counter reaches a given time-out value, an interrupt is triggered (only window watchdog) or a system reset is generated .
The following briefly introduces two different watchdog systems: (refer to Punctual Atoms )
- The independent watchdog (IWDG) is driven by a dedicated **low-speed clock (LSI)**, even if the main clock fails, it is still valid.
The independent watchdog is suitable for applications where the watchdog needs to be able to work completely independently outside the main program, and Penguin has low requirements for time accuracy.
- The window watchdog is driven by the clock divided from the APB1 clock. A configurable time window is used to detect abnormally late or premature operation of the application.
The window watchdog is most suitable for programs that require the watchdog to function in a precise timing window.
This article introduces the independent watchdog among them .
Two, an overview of the independent watchdog
1. Four registers of independent watchdog
The schematic diagram of the internal structure of the independent watchdog is as follows:
Among them, the most important thing is to understand the role of the four registers marked in the figure above :
First, the 32KHz clock signal indicated by the red arrow on the left enters the gatekeeping system, passes through the 8-bit prescaler with the division coefficient set by the prescaler register (IWDG_PR) , generates a new clock signal, and inputs it to 12-bit down counter .
After writing 0xCCCC in the key register (IWDG_KR) , the independent watchdog starts to work, and the 12-bit down counter (initial value is 0xFFF ) will decrement by 1 in each clock cycle. When it reaches 0x000 , the independent watchdog It will think that the program has run away, so it will generate a reset signal (IWDG_RESET) to reset the entire single-chip system.
So, how to tell the independent watchdog ** "the program is not running away" ? This requires us to write 0xAAAA (usually said to feed the dog) into the key register (IDWG_KR) . Once the key register** receives this signal, the reload register (IWDG_RLR) will assign the value in it to 12-bit down counter to prevent the down counter from decreasing to 0.
In addition, ②The status register can read the frequency division coefficient and the value loaded in IWDG_RLR , which is not commonly used.
Through the above mechanism, we can set an operation. Whenever this operation occurs, write 0xAAAA to IDWG_KR . At this time, IDWG_RLR will assign its saved value to the down counter to prevent system reset. If the system runs away, then this operation will not work, the down counter will be reduced to 0 , and the independent watchdog will send a reset signal to the system, triggering a reset.
NOTE: In the above four registers, ① prescaler register (IWDG_PR) and ③ reload registers (IWDG_RLR) having a write protection function, before writing its first remove the write protection .
2. Calculate the watchdog timeout time
First look at how the prescaler register (IDWG_PR) controls the division coefficient:
| IDWG_PR | Frequency division factor |
|---|---|
| 0 | /4 |
| 1 | /8 |
| 2 | /16 |
| 3 | /32 |
| 4 | /64 |
| 5 | /128 |
| 6 | /256 |
According to the above table, the division coefficient of the prescaler has the remaining relationship with the **prescaler register (IDWG_PR)**:
分频系数 = 4 x (2 ^ IDWG_PR )
Then, in accordance with the input clock signal frequency is 32KHz , the signal can be obtained after the prescaler of frequency is:
32 / [4 x (2 ^ IDWG_PR)]
Then, the signal after the prescaler clock cycle is the frequency of the inverse, namely:
4 x (2 ^ IDWG_PR) / 32
Then, because IDWG_RLR will assign its value to the down counter, so after IDWG_RLR subtraction, that is, IDWG_RLR clock cycles , if the down counter is not loaded again, then it will be reduced to 0, this is reduced to 0 by IDWG_RLR The time is:
4 x (2 ^ IDWG_PR) x IDWG_RLR / 32
Three, independent watchdog programming
1. Library functions commonly used by independent watchdogs
The library functions commonly used by independent watchdogs are as follows:
· IWDG_WriteAccessCmd(); //取消写保护：0x5555使能
· IWDG_SetPrescaler(); //设置预分频系数：写PR
· IWDG_SetReload(); //设置重装载值：写RLR
· IWDG_ReloadCounter(); //喂狗：写0xAAAA到KR
· IWDG_Enable(): //使能看门狗：写0xCCCC到KR
· IWDG_GetFlagStatus(); //状态：重装载/预分频 更新
Common operating steps of independent watchdog:
①Cancel register write protection:
IWDG_WriteAccessCmd();
②Set the prescaler coefficient of the independent watchdog to determine the clock:
IWDG_SetPrescaler();
③ provided watchdog reload value , determined overflow time:
IWDG_SetReload();
Note that after setting the reload value, the overflow time can be calculated by the following formula:
Tout = 4 x (2 ^ IDWG_PR) x IDWG_RLR / 32
④Enable watchdog
IWDG_Enable();
⑤The application program feeds the dog:
IWDG_ReloadCounter();
2. Programming
The function of this program is to start the watchdog, and then set the overflow time to 1s, and press the button as an operation signal for reloading the watchdog.