Based on stm32f103
Based on "Playing STM32 with Zero Dead Angle—F103 Guide"
A 12-bit down counter
STM32 has two watchdogs, one is an independent watchdog and the other is a window watchdog. The independent watchdog is called a pet dog, and the window watchdog is called a police dog.
An independent watchdog is one 12 位的递减计数器. When the counter value decreases from a certain value to 0, the system will generate one 复位信号, that is IWDG_RESET. If the counter value is refreshed before the count decreases to 0, then the reset signal will not be generated. This action is what we often call feeding the dog.
The watchdog function is powered by the VDD voltage domain and can still operate in stop mode and standby mode.
Functional block diagram
1. Independent RC oscillator LSI provides clock
The frequency is between 30~60KHZ, generally 40Khz is suitable for occasions with relatively low time accuracy requirements.
Prescaled counter clock
The clock of the down counter is obtained from the LSI through an 8-bit prescaler. The prescaler register IWDG_PR can be operated to set the division factor. The division factor can be: [4,8,16,32,64,128,256,256], a The counter clock counter is decremented by one.
The counter reaches 0 and the program restarts.
The counter of the independent watchdog is a 12-bit down counter with a maximum value of 0XFFF. When the counter decreases to 0, a reset signal: IWDG_RESET will be generated 程序重新启动运行. If the counter value is refreshed before the counter decreases to 0, the reset signal will not be generated. 重新刷新计数器值This action is commonly known as feeding the dog.
reload register
The reload register is a 12-bit register that contains the value to be refreshed to the counter. The size of this value determines the overflow time of the independent watchdog. Timeout time Tout = (4*2^prv) / 40 * rlv (s), prv is the value of the prescaler register, and rlv is the value of the reload register.
key register
The key register IWDG_KR can be said to be a control register for the independent watchdog. There are three main control methods. Writing the following three different values to this register has different effects: reloading the RLR value to CNT, reloading the register
0XAAAA , Write to CNT counter type
0X5555: PR and RLR. These two registers can be written (prescaler, reload)
0XCCCC: starting IWDG
by writing 0XCCC to the key register to start the watchdog is a software startup method 一旦独立看门狗启动，它就关不掉，只有复位才能关掉.
status register
Only bit 0: PVU and bit 1: RVU of the status register SR are valid. These two bits can only be operated by hardware, not software. RVU: Watchdog counter reload value update, set by hardware to 1 to indicate that the update of the reload value is in progress, cleared by hardware to 0 after the update is completed. PVU: The watchdog prescaler value is updated. The hardware sets it to '1' to indicate that the update of the prescaler value is in progress. When the update is completed, it is cleared by the hardware to 0. So the reload register/prescaler register can be updated only when RVU/PVU is equal to 0.
use
Enable
void IWDG_Config(uint8_t prv ,uint16_t rlv)
{
// 使能 预分频寄存器 PR 和重装载寄存器 RLR 可写
IWDG_WriteAccessCmd( IWDG_WriteAccess_Enable );
// 设置预分频器值
IWDG_SetPrescaler( prv );
// 设置重装载寄存器值
IWDG_SetReload(rlv);
// 把重装载寄存器的值放到计数器中
IWDG_ReloadCounter();
// 使能 IWDG
IWDG_Enable();
}
feed the dog
void IWDG_Feed(void)
{
// 把重装载寄存器的值放到计数器中，喂狗，防止 IWDG 复位
// 当计数器的值减到 0 的时候会产生系统复位
IWDG_ReloadCounter();
}