STM32CubeMX series|Independent watchdog

Independent watchdog

1. Introduction to Independent Watchdog

The watchdog is actually a timer. In terms of function, it allows the microcontroller to revert to the system just powered on when an accident occurs in the program (the program enters an infinite loop or runs away) to protect the system from problems It can be restarted once. To be more complicated, the watchdog is
the independent watchdog (IWDG) that can restart the system STM32. It is driven by the internal special 40KHz low-speed clock. Even if the main clock fails, it is still valid. Note that the IWDG clock is an internal RC clock, which is a variable clock between 30~60KHz, but we calculate it at a frequency of 40KHz when we estimate. The watchdog's requirements for time are not very precise and
independent. The functional block diagram of the door is as follows. In fact, the independent watchdog is a down counter. When the value of the timer decreases to 0, IWDG will generate a reset signal and the system will restart after reset. To avoid a watchdog reset, the counter needs to be reloaded before the counter decreases to 0, that is, "feed the dog". When a program error occurs, the counter is not refreshed, the counter is decremented to 0, and the system is reset and restarted to prevent the program from continuing to run incorrectly

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Independent watchdog timeout time (40KHz input clock LSI)

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2. Hardware design

Use USART1 to print debugging information, PC0 to indicate whether the program is reset

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3. Software design

3.1 STM32CubeMX settings

RCC sets external HSE, clock is set to 72M; IWDG clock defaults to LSI clock
PC0 is set to GPIO push-pull output mode, pull-up, high-speed, and the default output level is high
USART1 is selected as the asynchronous communication mode, the baud rate is set to 115200Bits/s, the transmission data length is 8Bit, no parity, 1 stop bit

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Activate IWDG, the clock of IWDG is 40kHz. At this time, set the counter clock to be divided by 32, then the divided clock frequency is 1.25KHz (clock cycle is 1s/1250 = 0.8ms), decrement the base unit reload value (down- counter reload value) is configured to 1000, that is, the system will reset if the IWDG is not refreshed in 800ms

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Enter the project name, select the project path (no Chinese), select MDK-ARM V5; check Generated periphera initialization as a pair of'.c/.h' files per IP; click GENERATE CODE to generate the project code

3.2 MDK-ARM programming

You can see the initialization function of the independent watchdog in the iwdg.c file

void MX_IWDG_Init(void){
    
    
  hiwdg.Instance = IWDG;
  hiwdg.Init.Prescaler = IWDG_PRESCALER_32;
  hiwdg.Init.Reload = 1000;
  if (HAL_IWDG_Init(&hiwdg) != HAL_OK){
    
    
    Error_Handler();
  }
}

Write the code in the main function, and feed the dog every 500ms in the while loop

int main(void){
    
    
  HAL_Init();
  SystemClock_Config();
  /* Initialize all configured peripherals */
  MX_GPIO_Init();
  MX_IWDG_Init();
  MX_USART1_UART_Init();
  /* USER CODE BEGIN 2 */
  printf("\r\n***** AndyXi IWDG test program *****\r\n");
  HAL_Delay(300);
  HAL_GPIO_WritePin(GPIOC,LED1_Pin,GPIO_PIN_RESET);
  /* USER CODE END 2 */
  /* USER CODE BEGIN WHILE */
  while (1){
    
    
	printf("\r\nRefreshes the IWDG...!\r\n");
	HAL_IWDG_Refresh(&hiwdg);
	HAL_Delay(500);
    /* USER CODE END WHILE */
  }
}

4. Download verification

The dog is fed every 500ms in the while loop, so the program will not be reset and LED1 is always on

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If you comment out the dog feeding action in the while loop, the program will always be reset and LED1 will flash

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