[Embedded system] Independent watchdog principle + watchdog experiment analysis

[Embedded system] Independent watchdog principle + watchdog experiment analysis

1. Overview of watchdog module

In a microcomputer system composed of a single chip microcomputer, because the operation of the single chip microcomputer is often interfered by the electromagnetic field from the outside, the program runs away and falls into an infinite loop-that is, the normal operation of the program is interrupted and the system cannot continue to work. In this case, the system will become stagnant and unpredictable consequences will occur. Therefore, for the consideration of real-time monitoring of the operating status of the single-chip microcomputer, a module or chip specially used for monitoring the operating status of the single-chip microcomputer program is produced , called a watchdog . STM32F10xxx has two built-in watchdogs: Independent WatchDoG (IWDG, Independent WatchDoG) and Windows WatchDoG (WWDG, Windows WatchDoG), which provide higher security, time accuracy and flexibility of use.

Figure 1 STM32 basic watchdog types The principles of WWDG and IWDG are different, this article only analyzes IWDG

2. Principle of IWDG

Figure 2 IWDG structure block diagram

IWDG is driven by an independent clock LSI and is in the VDD power supply area, so it can run in sleep, shutdown, and standby modes. When IWDG_KR writes 0xCCCC, the IWDG decrement counter starts, and the decrement starts from 0xFFFF. When the counter counts to 0, the system resets. Under normal working conditions, 0xAAAA will be written to IWDG_KR at regular intervals, that is, a 12bits value registered in IWDG_RLR will be loaded into the IWDG counter-it can be seen that IWDG will never trigger a system reset under normal operation; it will The dog cannot be fed normally, and the system resets after a period of time to maintain the stable operation of the system.

The watchdog overflow time is as follows, when the counter is reloaded for the first time, it exceeds $T_{out}$Not reloading will generate a system reset. In the battleship version, the LSI is 40kHz as shown in Figure 2, so let $f_{LSI}$=40即可
$$T_{out}=\frac{(4\times 2^{Pre})\times RLR}{f_{LSI}}$$

Figure 3 IWDG main registers

3. IWDG experiment analysis

This experiment is based on STM32NANO (HAL library), combined with KEY, LED and IWDG to observe the watchdog's monitoring reset function.

int main(void)
{
    
    
    HAL_Init();                    		//初始化HAL库    
    Stm32_Clock_Init(RCC_PLL_MUL9); 		//设置时钟,72M
    delay_init(72);                 		//初始化延时函数
	uart_init(115200);					//初始化串口
    LED_Init();                     		//初始化LED 
	KEY_Init();						//初始化按键
	delay_ms(100);                  		//延时100ms再初始化看门狗
    IWDG_Init(IWDG_PRESCALER_64,625);  	//分频数为64,重载值为625
    LED0=0;
	while(1)
	{
    
    
		if(KEY_Scan(1)==WKUP_PRES)  	//如果WK_UP按下，喂狗
		{
    
    
			IWDG_Feed();    			//喂狗
		}
			delay_ms(10); 
	}
}

IWDG_Init(IWDG_PRESCALER_64,625) sets the overflow time as:
$$T_{out}=\frac{64\times 625}{40}ms=1s$$
means that there is no dog feeding for more than$$1$$$$s$$ , and the system will perform a reset.

LED0=0 uses bit-band operation for lighting. The principle of bit-band operation and lighting can be referred to: bit-band operation principle + LED experiment analysis while (1) bind the dog feed function to the WK_UP button in the loop, that is, press WK_UP to execute Reload operation (KEY_Scan(1) is optional to support double-clicking). The delay_ms(100) before IWDG initialization is to make the flicker of LED0 visible: as shown in Figure 4, if there is no delay(), the time interval between two lights is very short, and it is impossible to observe the phenomenon of LED0 being turned off due to reset.

Figure 4

The following explains the principle of the encapsulated independent watchdog initialization function void IWDG_Init(u8,u16):

IWDG_HandleTypeDef IWDG_Handler;	 //独立看门狗句柄
void IWDG_Init(u8 prer,u16 rlr)
{
    
    
    IWDG_Handler.Instance=IWDG;
    IWDG_Handler.Init.Prescaler=prer;	 //设置IWDG分频系数
    IWDG_Handler.Init.Reload=rlr;		 //重装载值
    HAL_IWDG_Init(&IWDG_Handler);	 //初始化IWDG,默认会开启独立看门狗
	HAL_IWDG_Start(&IWDG_Handler);	 //启动独立看门狗
}

First of all, the global IWDG handle is defined in the IWDG header file . The handle is defined as follows, which contains resource information such as the base address of the IWDG register group, prescaler coefficient, and reload value.

typedef struct
{
    
    
  IWDG_TypeDef         *Instance;  /*!< Register base address    */

  IWDG_InitTypeDef       Init;      /*!< IWDG required parameters */

}IWDG_HandleTypeDef;

Next, initialize this global handle in the function, assign the input parameters Prep, Rlr, and IWDG base address to IWDG_Handle, and then use this handle for substantial IWDG initialization and startup. The code related to IWDG configuration in IWDG initialization package HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *) is given below

HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{
    
    
  ……
  /* Enable IWDG. LSI is turned on automaticaly */
  __HAL_IWDG_START(hiwdg);

  /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 0x5555 in KR */
  IWDG_ENABLE_WRITE_ACCESS(hiwdg);

  /* Write to IWDG registers the Prescaler & Reload values to work with */
  hiwdg->Instance->PR = hiwdg->Init.Prescaler;
  hiwdg->Instance->RLR = hiwdg->Init.Reload;

  /* Reload IWDG counter with value defined in the reload register */
  __HAL_IWDG_RELOAD_COUNTER(hiwdg);

  /* Return function status */
  return HAL_OK;
}

Most of the configuration is done through macro definition functions, such as

#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__)
WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)

Among them, IWDG_KEY_WRITE_ACCESS_ENABLE is 0x5555, that is, write 0x5555 to KR. Refer to Figure 3 to see that the write protection of RLR and PR is cancelled at this time, and the prescaler factor and reload value can be written into it.

After the IWDG is initialized and started, if the dog is not fed, the system will automatically reset after the overflow time is reached. IWDG_Feed() is a package of the macro definition function __HAL_IWDG_RELOAD_COUNTER(hiwdg), that is, write 0xAAAA to KR to reload the counter.