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高速PCB设计DDR3阻抗匹配计算及布线
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2021-11-22 00:38:52
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1 阻抗模型(信号1层与3层)
2 阻抗计算
2.1 数据线50欧阻抗匹配(线宽5mil)
2.2 地址线差分100欧阻抗匹配(间距8mil)
3 布线(xSignal)
同时选中,进行XSignal等长
3.1 xSignal向导器
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Origin
juejin.im/post/7032959813751406605
高速PCB设计DDR3阻抗匹配计算及布线
高速PCB设计DDR3阻抗匹配计算及布线
高速PCB设计DDR3阻抗匹配计算及布线
高速PCB设计DDR3阻抗匹配计算及布线
高速PCB设计DDR3阻抗匹配计算及布线
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