DDR3 in ODT (On-die termination)

What ODT that? Why use ODT? After consulting a lot of information and carefully read the official standard DDR3 (JESD79-3A), Let's tidy.

1, the first ODT what is?

ODT (On-Die Termination), from the DDR2 SDRAM era new features. Which allows users to read and write registers MR1, control connections inside the terminating resistor DDR3 SDRAM or disconnected. In DDR3 SDRAM, ODT function is mainly used in:

·DQ, DQS, DQS# and DM for x4 configuration

·DQ, DQS, DQS#, DM, TDQS and TDQS# for X8 configuration

·DQU, DQL, DQSU, DQSU#, DQSL, DQSL#, DMU and DML for X16 configuration

The specific structure is as follows:

2. Why use ODT?

A DDR channels, usually a plurality of articulated Rank, the Rank of the data lines, address lines and the like are common; data signal sequentially transmitted to each Rank will, when reaching the end of the line, there will be reflected waveform (interested the few mouthfuls to chew "signal integrity analysis" book club, personal expressed so hard), which affects the original signal; therefore necessary to add a terminal resistor, absorption aftermath. Before the DDR, termination resistors on the board to do, but for whatever reason, the effect is not very good, to DDR2, the internal termination resistors do DDR particles, also called On Die Termination, termination resistors on the Die, Die is silicon piece mean, here is the DDR particles.

Therefore, the purpose is very simple to use ODT, it is to allow DQS, RDQS, DQ, and DM signal is consumed at the termination resistance, to prevent these reflected signals are formed on the circuit, thereby enhancing the signal integrity. JESD79-3A with the original words is this:

The ODT feature is designed to improve signal integrity of the memory channel by allowing the DRAM controller to independently turn on/off termination resistance for any or all DRAM devices.

In general, the advantages of ODT technology is obvious.

First, remove the termination resistors and other electrical components on the motherboard, it would greatly reduce the manufacturing cost of the main board, and also enable the board design more compact.

Second, since it can be quickly turned on and off free memory chips, to a large extent reduce the power consumption when the memory is idle.

Third, the internal end chips than the end of the motherboard more timely and effective, thereby reducing memory latency latency. It also makes further enhance the DDR2 memory frequency possible.

3, DDR3 in ODT

3.1, ODT opening

The ODT Mode is enabled if any of MR1 {A9, A6, A2} or MR2 {A10, A9} are non zero.

3.2, ODT off

The ODT pin will be ignored if the Mode Registers MR1 and MR2 are programmed to disable ODT and in self-refresh mode.

3.3, ODT resistance selection

ODT resistance can clearance MR1 configuration registers {A9, A6, A2} modify

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Origin www.cnblogs.com/aerguqiuhui/p/12561283.html