[Ten Hard Guides] - 7.2 [Dynamic RAM] Analysis of the Differences between DDR4 and DDR3

Now that DDR4 is very mature, what are the more important improvements compared to DDR3? Let's take a look together:

  1. The appearance of DDR4 memory modules has changed significantly, and the gold fingers have become curved, making them easier to remove and insert and reduce pressure on the PCB.
  2. DDR4 memory uses point-to-point transmission internally, and the frequency is significantly increased, up to 4266MHz.
  3. DDR4 memory capacity has been significantly improved, with a single memory stick supporting up to 128GB.
  4. DDR4 power consumption is significantly reduced, and the voltage drops to 1.2V or even lower.

  DDR3 memory has been in service for eight years since it was put into service in 2007. Compared with Intel's update pace, memory development is quite slow. Fortunately, at the end of 2014, major manufacturers launched DDR4 memory products one after another, with the starting frequency reaching 2133MHz, marking the end of the DDR3 era.

1. Difference between DDR4 and DDR3 memory 1: Processor

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Haswell-E architecture diagram

  Every time the memory is upgraded, the processor must be supported. The memory of the Haswell-E platform is a four-channel design like IVB-E/SNB-E. The DDR4 memory frequency natively supports 2133MHz. This is a considerable improvement in the starting frequency compared to IVB-E's DDR3 native 1866MHz. As the new flagship, Haswell-E has two biggest improvements: one is the upgrade from 6 cores to 8 cores, and the other is support for DDR4.

2. Difference between DDR4 and DDR3 memory 2: Appearance

Card slot differences
  The location of the card slot on the DDR4 module is different from that on the DDR3 module. Both have the card slot on the insertion side, but the DDR4 card slot is positioned slightly differently to prevent the module from being installed into an incompatible motherboard or platform.

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Increased thickness
  In order to accommodate more signal layers, DDR4 modules are slightly thicker than DDR3.

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DDR4 gold fingers have changed a lot.
  Please pay attention to the picture above. The gold fingers of Apacer DDR4 memory have become curved and are not designed along a straight line. Why is this? For a long time, the flat gold finger of the memory will experience greater friction when inserted into the memory slot, so the memory is difficult to pull out and insert. In order to solve this problem, DDR4 designed the lower part of the memory to be slightly protruding in the middle. Shape with tapered edges. There is a smooth curve between the high point in the center and the low points at both ends. This design can not only ensure that the gold finger of the DDR4 memory and the memory slot contact have sufficient contact surface, and the signal transmission ensures stable signal, but also allows the middle raised part and the memory slot to generate sufficient friction to stabilize the memory.

  The location of the interface has also changed. The "notch" in the middle of the gold finger is closer to the center than DDR3. In terms of the number of golden finger contacts, ordinary DDR4 memory has 284, while DDR3 has 240, and the spacing of each contact is reduced from 1mm to 0.85mm.

Curved Edges
  DDR4 modules offer curved edges to facilitate insertion and relieve stress on the PCB during memory installation.

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3. Difference between DDR4 and DDR3 memory three: parameters

  The most important mission of DDR4 is of course to increase frequency and bandwidth. Each pin of DDR4 memory can provide 2Gbps (256MB/s) bandwidth. DDR4-3200 is 51.2GB/s, which is more than 70% higher than DDR3-1866.

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Default frequency DDR4 2133 CL15

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Bandwidth test at DDR4 2133 frequency: 48.4GB/s

  Judging from Apacer's 32GB DDR4-2133 memory, the default frequency bandwidth alone is as high as 48.4GB/s, which shows the importance of DDR4 in improving system performance.

  The other is the change of other parameters, such as capacity and voltage.

  After DDR4 uses 3DS stacking packaging technology, the capacity of a single memory can be up to 8 times that of current products. For example, the current common large-capacity memory has a single capacity of 8GB (single chip 512MB, 16 in total), while DDR4 can reach 64GB or even 128GB. In terms of voltage, DDR4 will be manufactured using a process below 20nm, and the voltage will drop from 1.5V in DDR3 to 1.2V in DDR4. The voltage of the mobile version of SO-DIMMD DR4 will drop even lower.

  Frequency and bandwidth are greatly improved

  Each pin of DDR4 memory can provide 2Gbps (256MB/s) bandwidth. DDR4-3200 is 51.2GB/s, which is more than 70% higher than DDR3-1866.

  In the development process of DDR, increasing the data prefetch value has always been the main performance improvement method. But in the DDR4 era, the increase in data prefetching became more difficult, so the Bank Group design was launched.

  What is the structure of Bank Group? Specifically, each Bank Group can read and write data independently, so that the internal data throughput is greatly improved, a large amount of data can be read at the same time, and the equivalent frequency of the memory is also greatly improved under this setting.

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  On DDR3 memory, the connection between the memory and the memory controller is realized through a multi-point branch bus. The characteristic of this design is that once the data transmission volume exceeds the carrying capacity of the channel, no matter how you increase the memory capacity, the performance will decrease. I can't see how much it has improved.

  Therefore, DDR4 abandoned this design and instead used a point-to-point bus: the memory controller can only support one memory per channel. The benefit of this design can greatly simplify the design of memory modules and make it easier to achieve higher frequencies. However, the problem of point-to-point design is also obvious: an important factor is that each channel of the point-to-point bus can only support one memory, so if the capacity of a single DDR4 memory is insufficient, it will be difficult to effectively increase the total memory of the system. Of course, this is not the fault of developers. 3DS packaging technology is the key technology to expand DDR4 capacity.

Capacity increased dramatically up to 128GB

  3DS (3-Dimensional Stack, three-dimensional stacking) technology is one of the most critical technologies in DDR4 memory. It is used to increase the capacity of a single chip.

  3DS technology was originally proposed by Micron. It is similar to traditional stacked packaging technology. For example, many processors and memories in mobile phone chips are stacked and welded on the motherboard to reduce volume. The difference between stacked welding and stacked packaging is that one is on the chip. After the packaging is completed, it is stacked on the PCB board; the other is stacked inside the chip before the chip is packaged. Generally speaking, when heat dissipation and process permitting, stacked packaging can greatly reduce the chip area, which is very helpful for product miniaturization. On DDR4, stacked packaging is mainly implemented in the form of TSV silicon through holes.

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  The so-called silicon through hole uses laser or etching to drill small holes in the silicon wafer, and then fills in the metal connection holes, so that the signals between different silicon wafers that have passed through the silicon through hole can be transmitted to each other. After using 3DS stacking packaging technology, the capacity of a single memory can be up to 8 times that of current products. For example, the current common large-capacity memory has a single capacity of 8GB (single chip 512MB, 16 in total), while DDR4 can reach 64GB or even 128GB.

Lower power consumption and lower voltage

  Lower voltage: This is a necessary element for the evolution of each generation of DDR, DDR4 has been reduced to 1.2V

  Let’s first look at the power consumption aspect. DDR4 memory uses TCSE (Temperature Compensated Self-Refresh, temperature compensated self-refresh, mainly used to reduce the power consumed by the memory chip during self-refresh), TCARtemperature Compensated Auto Refresh, temperature compensated automatic refresh, similar to TCSE), DBI ( Data Bus Inversion, data bus inversion, used to reduce VDDQ current and reduce switching operations) and other new technologies.

  These technologies can reduce the power consumption of DDR4 memory during use. Of course, as a new generation of memory, the most direct way to reduce power consumption is to use newer processes and lower voltages. At present, DDR4 will be manufactured using processes below 20nm, and the voltage will drop from 1.5V in DDR3 to 1.2V in DDR4. The voltage of the mobile version of SO-DIMMD DR4 will drop even lower. With process advancement, voltage reduction, and the combined use of multiple power consumption control technologies, the power consumption performance of DDR4 will be excellent.

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Origin blog.csdn.net/qq_37952052/article/details/125941909