Half-duplex serial, each device has an address IIC communication rate (100kb / s - 3.4Mb / s).
It has only two bidirectional signal lines. A data line SDA (serial data I / O) , the other is the clock line SCL (serial clock).
The effectiveness of the provisions 1 Data bits:
SCL is high, the data line must be stable, only the SCL line low, the state of the SDA was allowed to vary. as the picture shows
The start and stop signals 2.I2C
SCL line HIGH, SDA line from the high to a level low indicates a start signal level change;
SCL line HIGH, SDA line from the low to the level high indicates a change end signal level;
And transmitting a response byte 3.I2C
Endian data transfer, in the low, the number of bytes per transmission is not limited. The rear main transmission operation control means starts a first transmission byte address, wherein the first seven bits indicate a device with which a communication, the 8th bit data indicating the direction of transmission (transmission or reception).
In order to complete the transfer of one byte, the receiver should send an acknowledgment signal ACK to the sender, ACK signal appears at the ninth clock pulse on the SCK line, a valid response ACK presented on the SDA LOW, as shown in FIG.
The main control device upon receiving from the byte from the device, if not prepared to terminate the data transmission, he will send an ACK signal to the slave. Device when it receives a control byte from the host device always transmits an ACK signal to the main control device, if the device is not ready to receive again from, it can maintain a low bit SCK (wait on the bus) until it is ready to.
Timing requirements
- When the SCL at low level, the SDA allowable variation, i.e., the sender must be kept SCL is low, you can change the SDA data line, an output current data to be transmitted;
- When the time at a high level, must not change SDA SCL, because this time, the receiving side to read the level signal SDA is 0 or 1, so to ensure the stability of SDA
4. Role acknowledge bit
Host when transmitting data, one byte of data sent each time, are required to read the slave acknowledge bits may be received when a byte of data from the machine is idle, a response sent from the opportunity (a ninth data bit is "0 "), when the slave is busy handling other tasks too busy to receive data sent by the host, the opportunity is emitted from the non-response (a ninth data bit is" 1 ") issued by the host should continue to transmit a termination signal to complete the data , the master will acknowledge bit transmitted by the slave if the data is successfully received from the machine.
When the host receives data, it receives the last data byte must be sent to a slave end of the transfer signal. This signal is from the "non-response" to achieve by machine. Then, the slave releases the SDA line, allowing the host to produce a stop signal.
5 I2C is how to communicate?
s5pv210 is sending or receiving data is how to distinguish between multiple sub-devices? You can look: after the start of communication, the master device first sends 7bit bits slave device address, and a bit 1bit rean or write command,
(1) if the write command, the master communication line Free i.e. SDA SDA is high. Command is received then indicates (S) from the master device to ACK (down SDA). Then the master device transmits 8bit data from the device ACK (A). However, then ends (P).
(2) If the command is read, the first ACK from the master device (pull down the SDA), and transmits 8bit data ACK from the master device (pull down the SDA), from the transmission device until the master device stops receiving.
So below, the master device transmits a white bit position, the gray bit to transmission from the device.
6 I2C bus arbitration mechanism
https://blog.csdn.net/u010027547/article/details/47779975
Bus Control follows the "low priority", that is, who sent the line low who will take control of the bus; level of the main controller by detecting transmitted itself determines whether SDA bus arbitration occurs. Therefore, the bus arbitration IIC bus test device is the special structure of its own interface can be realized.