Reflections STM32 window watchdog WWDG library functions

WWDG current value of the counter and the activation bit register and the associated WWDG_CR. As shown below:

STM32f10x library functions and provides two set WWDG_CR [0: 6] bit mode.

 

•  WWDG_SetCounter method

#define BIT_Mask = 0x7F
/**
  * @brief  Sets the WWDG counter value.
  * @param  Counter: specifies the watchdog counter value.
  *   This parameter must be a number between 0x40 and 0x7F.
  * @retval None
  */
void WWDG_SetCounter(uint8_t Counter)
{
  /* Check the parameters */
  assert_param(IS_WWDG_COUNTER(Counter));
  /* Write to T[6:0] bits to configure the counter value, no need to do
     a read-modify-write; writing a 0 to WDGA bit does nothing */
  WWDG->CR = Counter & BIT_Mask;
}

The method as direct incoming WWDG_CR Counter register value.

• WWDG_Enable方法

#define CR_WDGA_Set 0x80
/**
  * @brief  Enables WWDG and load the counter value.                  
  * @param  Counter: specifies the watchdog counter value.
  *   This parameter must be a number between 0x40 and 0x7F.
  * @retval None
  */
void WWDG_Enable(uint8_t Counter)
{
  /* Check the parameters */
  assert_param(IS_WWDG_COUNTER(Counter));
  WWDG->CR = CR_WDGA_Set | Counter;
}

The method incoming Counter | 0x80 (i.e. WDGA 1) as the value of the register CR.

 

So there is a potential problem is that, when we call WWDG_Enable method, you must specify the Counter initialized.

After I've made this mistake before, I attempted to use WWDG_Enable (0x80) to activate the window watchdog, because the function name is enabled WWDG, but found that the board has continued to restart, careful analysis found that call WWDG_Enable (0x80) WWDG -> CR = CR_WDGA_Set | 0x80 = 0x80, then the register WWDG_CR [0: 6] becomes 0, so that the window watchdog reset crazy. .

In this record this error. .