table of Contents
Question 1
1
(26 points)
Explain concepts: Cache, main memory, auxiliary memory, virtual memory, RAM, SRAM, DRAM, ROM, MROM, PROM, EPROM, EEPROM, Flash Memory (2 points each).
Scoring guidance:
Cache: High-speed buffer memory, a small-capacity high-speed memory located inside the CPU, used to solve the problem of speed mismatch between the CPU and the main memory
Main memory: Main memory, used to store programs and data being executed. The CPU can directly perform random reading and writing, and the access speed is high
Auxiliary storage: Auxiliary storage, used to store all user programs and data. The CPU cannot read and write directly, and the access speed is slow
Virtual memory: virtual memory, the auxiliary memory is used to simulate the storage space of the main memory to store running programs and data.
RAM: Semiconductor random access memory, information can be read and written randomly
SRAM: Static semiconductor random access memory, used as Cache
DRAM: dynamic semiconductor random access memory, used as main memory
ROM: Read only memory, information can only be read but not written
MROM: Masked semiconductor read-only memory. The content is written by the chip manufacturer during manufacturing, and it can only be read but not written later
PROM: Programmable read-only memory, the user can determine the content to be written according to his needs, and can only be written once
EPROM: Optically erasable programmable read-only memory. Erasing is achieved by irradiating the glass window of the chip by ultraviolet or X-ray through charge leakage
EEPROM: Electrically erasable programmable read-only memory. Erase relies on a specific erase voltage to achieve
Flash Memory: Flash memory. Or called flash memory. It is an upgraded product of EEPROM
Question 2
2
(14 points)
The word length of a certain machine is 32 bits, and its storage capacity is 64KB. What is its addressing range by word addressing? (4 points) What is its addressing range by byte addressing? (4 points) Try to draw the memory address allocation diagram of the main memory by word address and by byte address (6 points).
Scoring guidance:
The addressing range of addressing by word is 0000H～3FFFH
The addressing range of byte addressing is 0000H～FFFFH
Question 3
3
( 20 points )
Suppose that the CPU has 16 address lines and 8 data lines, and uses MREQ (active low) as the memory access control signal, and R/W as the read and write command signal (high level is read, low level is write). There are 8 8K×8-bit RAM chips connected to the CPU, try to answer:
(1) Use 74138 (3:8 decoder) to draw the connection diagram between CPU and memory chip (8 points);
(2) Write out the address range of each piece of RAM (8 points);
(3) If it is found during operation that no matter which piece of RAM is written, the memory chip with A000H as the starting address has the same data, analyze the cause of the failure (4 points).
Scoring guidance:
（1）
(2) Address space allocation (1 point for each):
RAM0：0000H——1FFFH
RAM1：2000H——3FFFH
RAM2：4000H——5FFFH
RAM3 ： 6000H —— 7FFFH
RAM4：8000H——9FFFH
RAM5：A000H——BFFFH
RAM6：C000H——DFFFH
RAM7：E000H——FFFFH
(3) If it is found that no matter which piece of RAM is written to, the memory chip (RAM5) with A000H as the starting address has the same data as it, then the fundamental cause of the failure is: the chip select input of the RAM5 memory chip The terminal is likely to be always at low level. Assuming that the chip and the decoder itself are both good, the possible situations are:
1) The CS terminal and MREQ terminal of RAM5 are wrongly connected or short-circuited;
2) The CS terminal of RAM5 is wrongly connected or short-circuited with ground.
Question 4
4
( 20 points )
Suppose the main memory is addressed by word, the capacity is 256K words, the Cache capacity is 2K words, and the block length is 4 words (5 points each).
(1) Design the Cache address format.
(2) In direct mapping mode, design the main memory address format.
(3) In the four-way group associative mapping mode, design the main memory address format.
(4) In the fully associative mapping mode, design the main memory address format.
Scoring guidance:
Question 5
5
( 20 points )
Assuming that the main memory and Cache are both addressed in bytes, the main memory capacity is 1MB, the Cache capacity using the direct mapping method is 16KB, the block length is 4, and each word is 32 bits. What is the location of the storage unit whose main memory address is ABCDeh in the Cache?
Scoring guidance:
