1. Introduction to SPI

SPI works in a master-slave manner. One master device can correspond to one slave device, or one master device can correspond to multiple slave devices. Although it is a relationship between a master device and multiple slave devices, each communication is still a communication between a master device and a slave device. SPI communication is generally initiated by the host, and the host provides the clock signal.

MOSI (Master Out Slave In) : master device == "slave device (master device sends, slave device receives)
MISO (Master In Slave Out) : slave device == "master device (master device receives, slave device sends)
SCLK (Serial Clock) : Transmission clock signal for synchronization of master and slave devices
CSchip select) : chip select signal, used to select the slave device

2. The basic communication process of SPI

Like I2C, SPI is a commonly used communication interface. Compared with I2C, SPI has the following advantages:

fast . I2C up to 400KHz, but SPI can reach tens of MHz
full duplex . I2C is half-duplex, reading and writing needs to switch the transmission direction
The transmission is flexible . I2C can only transmit 8 bits at a time; the number of bits transmitted by SPI is not limited to 8 bits (there can be a wait state between two transmissions)
No start and end signals .

select slave device

When the master device wants to communicate with a slave device, the master device needs to first send an enable signal (high level or low level, depending on the slave device) to the CS line of the corresponding slave device, indicating that the slave device is selected.

data transmission

When the SPI bus is transmitting data, the high bit is transmitted first, and then the low bit is transmitted . For example, if you want to transmit the number 3, the conversion to binary is 0000 0011. Because it is serial communication, you can only transmit 1 bit at a time, so you need to decide whether to transmit the high bit or the low bit first.

Take CPOL = 0, CPHA = 1 as an example:

The sending end sends a signal : When the clock pulse reaches the falling edge, this period of time is the time to send data. (The sending data here includes the sending register address)

The receiving end receives the signal: when the clock pulse reaches the rising edge, this time is the time to receive data.

Therefore, SPI can complete the sending and receiving of data within one clock cycle, and can send and receive data continuously without limitation.

transfer complete or continue

After a byte transmission is completed, there is no need to respond, and the transmission of the next byte can be started directly, or the transmission can be aborted (or the amount can enter the waiting state). The SPI bus has no start or end signals.

3. Four working modes of SPI

SPI can complete data transmission and reception within one clock cycle, the key is to send and receive data when two edge changes of one clock cycle. But not limited to the above, the rising edge must be sending, and the falling edge must be receiving, which depends on the polarity and phase.

1. Polarity and Phase

Polarity (CPOL) refers to the state of the clock pulse during idle moments. CPOL = 0, low level during idle time; CPOL = 1, high level during idle time

Phase (CPHA) refers to the sampling instant. For example, whether to choose the falling edge to send data or the rising edge to send data. CPHA = 0, the first jump edge is received; CPHA = 1, the first jump edge is sent.