Abnormal analysis of single chip SPI communication

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Transfer from | STM32

SPI, the full name of Serial Peripheral Interface (Serial Peripheral Interface) , is a synchronous serial communication interface for short-distance communication, mainly used in embedded systems.

SPI has a wide range of applications, and many devices such as display modules, clock chips, memory chips, and temperature sensors use the SPI interface to communicate.

These devices are usually used as slave devices, and the single-chip microcomputer is used as the master device to control them. Today, we will combine STM32 to analyze the abnormal problems of common SPI communication.

STM32 SPI basic content

Most STM32 chips have multiple SPI peripherals, which can perform half-duplex/full-duplex synchronous serial communication with external SPI devices.

1. SPI characteristics

  • Three lines full duplex, two lines simplex synchronous transmission

  • Support 8-bit or 16-bit transmission frame format selection

  • Supports master or slave mode operation

  • Programmable clock polarity and phase

  • Support MSB or LSB data order

  • Support DMA to send and receive data

For more features, please refer to the "STM32 Reference Manual".

2. Pin Description

MISO: master input/slave output data;

MOSI: master output/slave input data;

SCK: clock (master output, slave input clock);

NSS: Slave device selection, understandable chip selection signal;

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3. SPI Timing

There are two parameters to pay attention to in the timing of SPI, that is, clock phase and clock polarity. In STM32, the SPI timing is determined by the two bits CPOL and CPHA.

These two parameters can be configured by software, which can be divided into four timing relationships, as shown in the figure below:

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4. Data frame format

Serial peer-to-peer data transmission is divided into MSB and LSB, that is, the most significant bit first, or the least significant bit first. (Note: The leftmost bit is the most significant bit).

For example, to transmit a byte: 0x95 (1001 0101).

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If according to MSB (high bit first), the sending sequence: 1001 0101.

If according to LSB (lower bit first), the sending order is reversed: 1010 1001.

STM32 SPI parameter configuration

Usually the SPI of STM32 is used as the master to connect to the external slave. To establish normal communication with the slave, it must match the parameters of the slave.

Here we take [STM32 as an SPI host to read and write SPI Flash] as an example, the main configuration parameters: two-way full duplex, host mode, 8-bit data, MSB, etc.

1. Standard peripheral library configuration

SPI_InitTypeDef  SPI_InitStructure;


SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; //双向全双工
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;                      //主机模式
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;                  //8位数据
SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;                        //时钟极性:空闲为高
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;                       //时钟相位:第2个时钟沿捕获
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;                          //软件控制NSS信号
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; //波特率预分频值为4
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;                 //数据传输从 MSB 位开始
SPI_InitStructure.SPI_CRCPolynomial = 7;


SPI_Init(SPI1, &SPI_InitStructure);

▲ Swipe left and right to view the complete code 

2. STM32CubeMX configuration

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First select the full-duplex host mode, and then configure the following parameters step by step. The baud rate clock here is not configurable in gray and is determined by your system clock and frequency division clock.

These configuration parameters are relatively easy to understand (clear and clear English), if you do not understand, you can refer to the reference manual.

STM32 SPI FAQ

Although SPI is relatively simple, there are still some strange problems in the actual application process. The following cases will analyze some common problems of SPI.

Question one:NSS chip selection problem

Some engineers use hardware NSS to control the slave, thinking that the NSS signal is automatically controlled, resulting in failure to operate the slave.

Reasons for analysis: The NSS signal of STM32 SPI is a chip select signal, which can be "enabled" as hardware control (see the parameter configuration above).

But in the application, software operation is also required to control the NSS signal (high and low), such as:

SPI_NSSInternalSoftwareConfig(SPI1, SPI_NSSInternalSoft_Set);

▲ Swipe left and right to view the complete code 

Solution: According to the communication timing, control the NSS signal high or low (usually low is effective).

Question 2: SPI pin multiplexing function problem

The SPI of STM32 is a multiplexing function. Engineers who used the standard peripheral library before are likely to miss the configuration of the multiplexing function and make SPI unusable.

Reasons for analysis: Some SPI pins correspond to special function pins, for example: PB3 (MISO) corresponds to JTDO, if not configured, the default function of this pin is the function of JTDO.

This problem often existed before, but now the multiplexing function is automatically configured when configuring through the tool STM32CubeMX.

Solution: Refer to the official provision to configure the reuse function in the initialization code (at the same time, it is recommended to use the HAL library).

GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_SPI1);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource6, GPIO_AF_SPI1);

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Problem 3: The clock rate is too high

An engineer bought a module with SPI communication, the maximum communication rate is 8MB/s, and he can also use it with a communication rate of 10.5MB/s, but occasionally there will be communication abnormalities.

Reasons for analysis: The nominal maximum rate of a chip is actually a relatively conservative value. It can be used if the condition is better than the maximum rate, but the stability cannot be guaranteed.

The clock frequency of STM32 SPI is determined by the system clock and frequency division. Some engineers don't have a deep understanding of these parameters, and they don't care if they find that they can be used.

Like the 21MB/s in the above chapter, if you modify the system clock, this value will actually change accordingly

Solution: The easiest way is to modify the frequency division value. At the same time, if the environment is harsh, it is recommended to use shielded wires. (While ensuring the real-time performance of the entire product system, the communication rate should be reduced as much as possible)

Question 4: Clock phase problem

Many engineers will encounter the problem of data "shift" when debugging SPI. Why does this problem occur when data can be sent and received?

Reasons for analysis: The SPI communication clock is provided by the master, and the respective signals (master and slave) are unstable when they are powered on. If the clock phases of the slaves do not match, the data will be shifted or abnormal due to the clock.

Solution: Match the clock phase of the SPI master and slave devices on the software, use communication protocols, CRC, checksum checks, etc.

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Origin blog.csdn.net/ybhuangfugui/article/details/132386576