First, the primer
Last lecture, we explain the clock signal is how to achieve, and how to use this clock signal to control the read and write data, so that we may be able to require the data "store" down. So, this talk, we want the computer to "Auto" up and running.
By a clock signal, we can realize a counter, this will be our PC register. Then, we need to be able to help us find a specified data memory address decoder in the inside, and parsing the read machine instruction decoder.
In this way, we will be able to learn all of the hardware components together, it turned into a CPU, to achieve our operational steps in the operative part of computer instructions.
Two, PC register the required counter
We often say that the PC register by the name of the program counter. Here we take a look at why it's called a program counter.
With the clock signal, we can provide a timing input; With D flip-flop, we can write data at a time point of the clock signal control. We combine these two functions, you can achieve an automatic counter a.
Two input adder, is always set to a 1, the other from a D-type flip A. We adder outputs the result, the D flip-flop A is written inside. Thus, D-type flip-flops which data will be
In a fixed clock signal is updated every time.
In this way, we have a every clock cycle, can be fixed automatically increment the counter 1. This automatic counter, when our PC can be used to register. In fact, this PC, PC register
English is the Program Counter, which is the program counter means.
Since each increase, we can go to the corresponding values of D-type flip inside, which is why we need to run the next address of the instruction. Speaking in front of 5th we talked about,
with a program of instruction should be sequentially stored in the memory inside. Here on the front and on the correspondence, sequentially storing instructions, just to let us continue to be able to periodically perform a new instruction by the program counter.
Counting up, the value of memory, and even the back of the command execution, and ultimately by the clock signal we are in fact talking about the beginning, to control the time and point of execution order, which is the core reason for the timing circuit we need.
In the simplest case, we need to let each instruction, counting from the program, to get instruction, the instruction is executed in one clock cycle. If the PC register increment too quickly, the program will go wrong.
Since the previous calculation result is not yet written back to the register corresponding to the inside when an instruction has already started to read back the data in which the calculated time to do. This time, if we use the same instruction register
memory, calculates the previous instruction will have no effect, the results are wrong.
In this design, we need a clock cycle, to ensure complete implementation of one of the most complex CPU instruction, which is the longest a CPU instruction. This CPU design, we call it a single instruction cycle with the processor (Single Cycle Processor).
Obviously, this design is a bit wasted. Because even if only to call a very simple instructions, and we need to wait for the entire clock cycle time to finish before the next instruction. In later chapters we will talk about, performance optimization through the pipeline technology can reduce the time to wait, here comes the time being we are here.
Three, needed to read and write data decoder
Now, our data can be stored in the D flip-flop. If we put a lot of D-type flip-flops together and form a large storage space and can even be used as a memory. As I now hand this computer
has 16G of memory. Then how can we know, writing and reading of data, in which such a large number of memory bits it?
So we need to have a circuit to complete the "address" of the work. The "Addressing" circuit, that is, we are going to talk about the decoder.
In actual use inside the computer now, DRAM memory used, not through the top of the D-type flip-flop to achieve, but the use of a CMOS chip to achieve. However, this does not affect our understanding of the basic principles of respect to the decoder.
Here, we can put the memory chips, as are a number of D-type flip-flops together to achieve.
If the simplest case, "addressing" It's something to degenerate, that is, two addresses, to select an address. Such a circuit, which we call the selector 2-1. I put it in the circuit implementation painted here.
We through an inverter, two AND gates and an OR gate, can be achieved a 2-1 selector . By controlling the input of the inverter is 0 or 1, can determine a corresponding output signal, and the input signal is the address A, address B is the same.
An inverter so that only two states 0 and 1, so we can only select one of the two addresses. If the input signal has three different switches, we can, i.e. eight addresses are selected from a ^ $ 2 $ 3. Such a circuit, we called 3-8 decoder device . Modern computers, if the CPU is a 64 bit, it means that we are addressing space $ $ 2 ^ {64}, then we need a decoder 64 switches.
So, in fact, the essence of the decoder, the signal from the plurality of bits is input, and in accordance with a certain combination of the switching circuit, selects the signal you want. In addition to possible "address", we also need to put the corresponding operation instruction code, through the same decoder, we find
Desired instruction is executed, that is, before we had mentioned of opcode, and behind the corresponding operand or a register address. However, such "coder", compared to 2-1 and 3-8 to select a decoder, much more complex.
Fourth, establish a data path, construct a simple CPU
1, how to combine these parts
D flip-flop, automatic counting and decoder, plus a said before we ALU, we have assembled a cobble together a CPU must be part of the. Here, we take a look at how these parts are combined in order to achieve instruction execution logic and arithmetic calculations CPU.
1. First, we have an automatic counter. This automatic counter with clock speeds continue to increase since, as our PC register.
2. After the automatic counter, we connected to a decoder. Decoder would also have attached our memory through a lot of D flip-flops.
The automatic counter clocked with the clock continues to increment, which from the decoder, to find the memory address corresponding to the counter represented by the CPU and read instructions inside.
4. The CPU reads out the control instruction our CPU clock, is written to a register composed of D flip-flop, which is an instruction register.
5. after the command register, we can talk to a decoder. The decoder is used to address the longer, but rather we get the instruction opcode and resolved into the corresponding operands.
6. When we get the corresponding opcode and operands, the corresponding output line, to connect to the ALU, starts various arithmetic and logic operations. Corresponding to the calculation result, it will write back to the D flip-flop registers or memory of them.
Such a complete pathway, we also completed the process of execution of an instruction of the CPU. In this process, you will find this a few interesting questions.
2, an interesting question
It is the condition code register before we talk about in the sixth over of the program jumps used. At that time, when talking about computer instruction execution, we say high-level language if ... else, in fact, turned into a cmp instruction and a jmp instruction.
cmp comparison instruction is performed corresponding to the result of comparison to the condition code register will update them. The flag jmp instruction is among the bit condition code register, to determine if the jump and jump to what address.
I do not know when you see this knowledge when there are any doubts, why do we become so if ... else two instructions, rather than designed as a complex circuit, into an instruction? Here, we can explain.
Such divided into two instructions, and exact match well in our circuit level, the step of "coding - Update Register - execution."
cmp instruction execution result into the condition code register inside our conditional jump instruction is executed in the ALU level, rather than executed in the controller inside. Such an implementation of the circuit is very intuitive level, we do not need a very complex circuitry
can be achieved if ... else functions.
3, the second interesting question
We talked about the differences in Lecture 17 in the instruction cycle, CPU cycles and clock cycles. In the abstract logical model above, you can easily find, we execute an instruction, in fact, can not be placed inside a clock cycle,
can be directly split into multiple clock cycles.
We can inside in one clock cycle, to increment the value of the PC register, i.e. memory address corresponding to the command. Then, we have to read instructions from the D flip-flops inside this address, or this can be just the clock.
But the write command corresponding to the instruction register, we can be placed inside a new clock cycle. Calculation result to the instruction decoder after the ALU, to write back to the register, and can put another new clock cycle. Therefore, the implementation of a computer instruction,
In fact, can be split into a number of clock cycles, the design must be used instead of a single processor instruction cycle.
Because the instructions are read from memory inside for a long time, so if you use a single processor instruction cycle, it means that we have to wait for some instruction slow operation. These differences in instruction execution speeds, there is also instruction cycle computer instructions,
the reasons CPU clock cycles and partial cycles. Therefore, we optimize the performance of a modern CPU, the CPU is not using single instruction cycle with the processor, but through the pipeline, branch prediction techniques to achieve simultaneous execution of multiple instructions in a cycle.
V. Summary extension
Well, today we finished, how different functions by connecting the circuit to achieve a complete CPU.
We can automatically counter circuit, to achieve a PC register, the memory address of the computer continuously generates an instruction to be executed. Then through the decoder, which is read from the corresponding memory instruction
is written to the D flip-flops in the instruction register achieve. Then through another decoder, it resolved into operand address of the instruction and we need to perform. These circuits form part of a five us computer controller.
We corresponding opcode and operands, sent to the ALU for calculation, the calculation result write back to the register and memory inside, this is our five part inside the computer operator.
Our clock signal, provides a mechanism for coordinating such an instruction execution time and the order of. Similarly, it also brings a challenge, and that is a single processor instruction cycle to execute an instruction for far too long. And this challenge
is what we speak the next few years to answer the question.