1. Representation of data
1.1 base conversion
1.
Convert R base to decimal
2. Decimal to R-based
Decimal to R-based using short division
3. Binary to octal and hexadecimal
Binary from right to left corresponds to an octal digit every 3 digits, the following binary number 10001110 corresponds to octal 216
Every 4 bits from right to left in binary corresponds to a hexadecimal digit
In hexadecimal: A=10, B=11, C=12, D=13, E=14 , F=15
The following binary number 10001110 corresponds to hexadecimal 0X8E, and other forms of hexadecimal represent 8EH.
1.2 Original code, inverse code, complement code, code shift
The original code: the machine code, the binary form of the value, the highest bit (sign bit) indicates the sign: 0 is a positive number, 1 is a negative number
inverse code: the original code of a positive number is the same as the inverse code, and the inverse code of a negative number is different except for the highest bit. If it is changed outside, all the following bits are reversed.
Complement code: The original code of a positive number is the same as the complement code. The complement code of a negative number = the inverse code + 1. The computer uses the complement code for addition and subtraction.
Code shift: On the basis of complement code, the sign bit is inverted
1.3 Floating point arithmetic
Natural numbers ending in 1 to 9
Small order to large order: When calculating, the small floating point number is converted to the number represented by the same scientific notation, and the calculation is performed with the large floating point number.
For example: 3.14×10^3+1.2×10^5=0.0314×10^5+1.2×10^5
Floating point operation features:
2. Computer Structure
The basic structure diagram of the host:
Focus: arithmetic unit and controller. The roles of their different components.
2.1 CPU
It is often necessary to set up multi-level caches inside and outside the CPU, and the main purpose is to improve the efficiency of CPU access to main memory data or instructions.
In the running process of the computer, it is necessary to save the scene when carrying out interrupt processing, and its purpose is to correctly return to the interrupted program to continue execution.
The mapping between the cache and the main memory is automatically realized by the hardware, and the interaction between the main memory and the auxiliary memory is realized by the combination of hardware and software.
In the process of executing instructions, the CPU will automatically modifyprogram counter, so that it always holds the address of the next instruction to be executed. (Exam questions for the second half of 2018.01)
- Instruction register: A register for temporarily placing program instructions obtained from memory, which is used to store an instruction currently being executed that is read from main storage.
- Address register: The address register is used to store the address of the memory unit accessed by the current CPU.
- Instruction decoder: An instruction fetched by the instruction decoder from the memory is sent to the instruction register via the data bus.The main function of the decoder is to decode the instructions.
calculator
The arithmetic unit is used for the arithmetic work of the CPU. The arithmetic unit is mainly composed of the arithmetic logic unit ALU, the accumulation register, the data buffer register, and the state condition register.
controller
The CPU controller is used for the control of the entire CPU. It is responsible for sequentially accessing program instructions, decoding instructions, and coordinating other devices. The controller usually consists of a program counter, an instruction register, an instruction decoder, a status/condition register, and a timing generator. , composed of micro-operation signal generator.
2.2 Main memory
Main memory, that is, memory mainly uses dynamic random access memory DRAM, Cache uses static random access memory SRAM, and EEPROM is electrically erasable programmable read-only memory. Hard drives are external storage.
2.3 DMA
The DMA method has also become a direct main memory access method. The idea is to allow direct bulk data exchange between the main memory and the I/O device through the "DMA controller (DMAC)", except at the beginning and end of the data transfer, the entire The process requires no intervention from the CPU.
3. Computer Architecture Classification - Flynn Taxonomy
Flynn's taxonomy is a taxonomy of computer architecture
Emphasis: The representative of single instruction stream and multiple data stream is array processor
4. CISC and RISC (instruction system type)
4.1 Instructions
4.2 Addressing Mode
4.3 Differences between CISC and RISC
RISC reduced instruction system has few addressing modes, usually only supports register addressing mode, immediate number addressing mode and relative addressing mode.
5. Pipeline
5.1 Basic Concepts
Pipelining means that when the program is executedMultiple instructions overlap operationA quasi-parallel processing implementation technology. The simultaneous processing of various components refers to different instructions, and they can work for different parts of multiple instructions at the same time, so as to improve the utilization rate of each component and the average execution speed of the instructions.
Such as the basic operation of the instruction: value->analysis->execution operation. Instructions 1, 2, and 3 complete the operations of value acquisition, analysis, and execution, respectively.
5.2 Pipeline Computation
The pipeline cycle isThe period of time that the instruction takes the longest to execute。
Pipeline execution time calculation formula
1 instruction execution time + (number of instructions - 1) * pipeline cycle
①Theoretical formula: (t1+t2+…tk)+(n-1)*pipeline cycle, n is the number of instructions
②Practical formula: (k+n-1)*pipeline cycle, k is the number of steps executed by the instruction
E.g:
The pipeline cycle is 2ns
Theoretical formula=(2+2+1)*(100-1)*2=203Practical
formula=(3+100-1)*2=204
Extension:
superscalar pipeline, more than one pipeline (degree > 1)
Pipeline Throughput Calculation
The throughput rate of the pipeline refers to the number of tasks completed by the pipeline or the number of output results in unit time. The most basic formula for calculating the throughput of the pipeline is as follows:
Maximum throughput of the pipeline: 1/pipeline cycle
Pipeline Speedup Calculation
The pipeline speedup calculation refers to the completion of the same batch of tasks, and the ratio of all the time without using the pipeline to the time spent using the pipeline is called the speedup ratio of the pipeline. The basic formula for calculating the pipeline speedup is as follows:
As above: S=(2+2+1)*100/203
Pipeline Efficiency
The efficiency of the pipeline refers to the equipment utilization of the pipeline. On the space-time diagram, the efficiency of the pipeline is defined as the ratio of the space-time area occupied by n tasks to the total space-time area of k pipeline segments.
The formula for calculating the pipeline efficiency is as follows:
For example: The
pipeline efficiency is (△t+△t+△t+3*△t) 4/15△t 4=24/60=40%
6. Computer Hierarchical Storage Structure
The hierarchical structure of computer storage is shown in the figure:
cache
In the computer's storage system architecture, Cache accesses the fastest level (if there is a register, select the register). The basis for using caches to improve system performance is the principle of program locality.
The function of the cache: improve the rate of CPU data input and output, and break through the von Neumann bottleneck, that is, the bandwidth limitation of data transmission between the CPU and the storage system.
Address Mapping
Direct Associative Mapping
fully associative image
group associative image
time crunch and space crunch
Working Set Theory: A working set is a collection of pages that are frequently accessed while a process is running.
The principle of locality refers to the tendency of a computer to use the most recently used data when executing a program. The locality principle has two manifestations:
- Temporal locality means that if an instruction in a program is executed once, that instruction may be executed again in the near future.
- Spatial locality means that once a program accesses a storage unit, its nearby storage units are most likely to be accessed in the near future.
Main memory (memory)
Main memory (memory) is divided into two categories: random access memory (RAM) and read only memory (ROM)
random access memory
Random access memory is also known as read-write memory or main memory where programs and data required by the CPU during program execution are stored. It is volatile memory because data is lost when the power is turned off.
ROM
Read-only memory (read-only memory) is used to store critical information necessary for the operating system, such as programs needed to start the computer. ROM always retains its data and is not easily lost.
Main memory addressing and computation
main memory addressing
7. Disk
question:
Disk structure and parameters
How Disks Work
8. Computer bus
A bus allows only one device to transmit at a time, but multiple devices to receive.The internal bus of the computer is a three-bus structure, which are the address bus, the data bus and the control bus.
Depending on where the bus is located, the bus is usually divided into three types:
- Internal bus
- System bus: data bus, address bus, control bus
- external bus
Classification of system bus:
9. System reliability analysis
Tandem system
R(n) represents the reliability of a single system
Parallel system
Modular redundant system
Hybrid system
10. Check code
Code distance: Any kind of code is composed of many code words, and the least changed binary number between any two code words is called the code distance of the data check code.
For example, if 16 states are represented by 4-bit binary, there are 16 different code words. At this time, the code distance is 1, such as 0000 and 0001, and the conversion between them only needs to change one binary bit.
The code distance of a coding system is the minimum distance between any (all) two code words in the whole coding system.
E.g:
What is the relationship between code distance and error detection and correction?
- In order to detect e errors in a code group, the minimum code distance d should satisfy: d>=e+1
- In order to correct t errors in a code group, the minimum code distance d should satisfy: d>=2t+1
parity
Parity check is error-detecting but not error-correcting
Modulo 2 division
What is modulo 2 division and how is it different from ordinary division?
Modulo 2 trigger refers to the trigger that does not count the carry during the division operation.
(do XOR operation)
Cyclic Check Code CRC
Cyclic redundancy check code uses modulo 2 operation,Cyclic redundancy check code and parity check can only detect but not correct errors
The original code corresponding to the polynomial is 11011, and the calculation result is:
Hamming check code
Hamming code is a check method that uses parity to detect and correct errors, and the minimum code distance is 2n+1. Hamming check codes can both detect and correct errors.
11. Embedded Systems
Features of embedded systems:
- miniaturization
- customizable
- real-time
- reliability
- Portability
In a microcomputer system, the BIOS (Basic Input Output System) is stored inROM on the motherboardmiddle. BIOS is a program, which is solidified in the BIOS ROM chip of the motherboard. It is equivalent to an operating system at the bottom of the hardware, which controls and saves the input and output of the hardware.
Notes summarized from: