Xilinx FPGA helps intelligent crowd monitoring system
Kenshin FPGA development circles
as the economy continues to develop a variety of high-rise buildings into the sky, while these buildings are growing flow of people, especially some of the large commercial entertainment, supermarkets, banks, subway and some held a large meeting space, etc. In crowded areas, relying solely on manual monitoring of these areas is undoubtedly stretched. If manual negligence occurs, it will cause serious public safety accidents and endanger personal safety. Therefore, it is necessary to develop an intelligent crowd monitoring system to help people accurately and timely judge and prevent abnormal activities in the crowd.
At present, governments and security agencies in many countries are beginning to explore smarter crowd monitoring methods to prevent tragedies. However, there are still many obstacles to achieve this goal, and traditional manual methods are definitely not feasible. The only solution is to develop an intelligent vision system that can automatically monitor the activities of the crowd, and use video analysis technology to identify potentially harmful behaviors and notify the control center.
Figure 1 Crowd monitoring and identification
To design such an intelligent machine vision system requires not only advanced image sensors and optical systems, but also high-performance video processors to complete video analysis. The reason for the need for more powerful video processors is complex video analysis techniques, most of which use computationally intensive video processing algorithms.
FPGA is a processor chip that meets the needs of such applications. At present, Xilinx has introduced HLS tools and UltraFast design methods, allowing developers to use FPGAs to design more optimized and high-performance applications. We can also implement embedded processors inside FPGAs, such as Xilinx MicroBlaze, which means that some applications that require complex control procedures can be transplanted to FPGAs.
Xilinx provides a reference design for a crowd behavior monitoring and classification system. The design architecture is a soft core to achieve system control, and the video image analysis algorithm uses hardware acceleration. The FPGA model uses the low-cost Spartan-6 LX45. This design does not take a long time from proposal to completion, but it shows the expected real-time dynamic monitoring performance, with low cost, highly flexible and expandable characteristics.
Figure 2 The implementation of the FPGA internal architecture design
crowd behavior classification algorithm needs to obtain the video frame image through the video frame queue function API interface. When a frame of image is obtained, the application program will pass the current and image frame data and the previous frame image data to the hardware The accelerator completes the behavior vector analysis calculation, and then the software part calculates the statistical data of the behavior vector and obtains the classification result. The reason for implementing these steps in the software part is that these steps do not involve pixel-level image processing and will not increase the processor performance overhead. After the classification result is obtained, the on-screen display function interface can be called to display the calculation result and the simulated behavior vector model. The on-screen display function interface is implemented in the Xilinx SDK tool using C/C++ language.
FPGA is equivalent to the brain of the visual system. The more developed the brain power, the more tasks it can handle. The image processing algorithms used in crowd behavior monitoring and behavior category judgment require a lot of intensive computing processing, FPGA parallel processing, hardware acceleration, and design Flexible features make it the best choice for high-performance demand areas.