FPGA application study notes

Multiplexing logical resources (at the cost of traffic)

Common methods: iteration is the iteration of the first chapter 1 simple loop 2 complex logic multiplexing

Speed ​​Priority: Break the Loop Area Priority: Fold the Pipeline

The multiplier turns into a shift-accumulate

Control Based Logic Multiplexing

When the shared logic is larger than the control logic, a state machine can be utilized for logic control

For example, this FIR filter uses the multiplier multiple times during the convolution process

Y=coeffA*X[0]+coeffB*X[1]+coeffC*X[2]

Can be simplified with a single multiplier and accumulator (using state machine control logic)

 

 

 

 

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Origin blog.csdn.net/weixin_63163242/article/details/131764236