Series of articles catalog
1. Component foundation
2. Circuit design 3. PCB design 4. Component soldering 6. Program design
Article Directory
Preface
From the perspective of EMC (Electromagnetic Compatibility) design, the EMC design of PCB board is the basis of EMC system design. The initial stage of PCB EMC design is the setting of layers. Unreasonable layer design forms may generate a lot of noise and form EMI interference and own EMC problems. Therefore, a reasonable layer layout is as important as circuit design.
To make the layer layout of the PCB system meet its electromagnetic compatibility requirements, usually the system layer layout needs to start from three points: the corresponding function module distribution; the performance index requirements of the integrated single board; the cost tolerance. PCB board layer is composed of power layer, ground layer and signal layer. The choice of layers, the relative position of the layers, and the division and distribution of power and ground planes will play a vital role in the PCB board wiring, signal quality, interface circuit processing, and the EMC indicators of the single board, and it will also directly affect the entire machine. Electromagnetic compatibility of equipment.
1. The layout of the PCB layer
1. The choice of the number of layers
A single board is composed of a power layer, a ground layer and a signal layer; the number of layers is the sum of their respective numbers. Determine the number of layers of the board according to the comprehensive factors such as the power supply of the board, the type of ground, the density of signal lines, the signal frequency, the number of signals required by special wiring, the peripheral elements, and the cost price. To meet the strict specifications of EMC and consider the manufacturing cost, appropriately increasing the ground plane is one of the best methods for PCB EMC design.
①. Number of power layers of single board
The number of layers of a single board power supply is determined by the type and quantity of the power supply. For PCBs powered by a single power supply, only one power plane is required; for multiple power supplies, if they need not to be interleaved with each other, consider adopting power layer division; for single boards with interleaved power supplies, such as the device MPC8260, multiple power supplies are required, and Interlacing each other, you must consider the use of two or more power planes.
②. Number of signal layers
Generally speaking, the number of signal layers is determined by the function of the single board. Most experienced CAD engineers usually provide layout and wiring density parameter reports by EDA software, and then combine the board-level operating frequency, the number of signals required for special wiring, and the performance indicators and cost tolerance of the single board to determine the signal of the single board. Number of layers. From the EMC perspective, it is necessary to consider the shielding or isolation of key signals (such as clocks, reset signals, etc.) to determine whether to increase the number of single-board layers.
2. Layer layout
①. The basic principles of EMC
✪ The key power plane and its corresponding ground plane are adjacent to the power supply and the ground plane has its own characteristic impedance. The impedance of the power plane is higher than that of the ground plane. Adjacent the power plane and the ground plane can form a coupling capacitor, and it will be connected to the PCB board. The decoupling capacitors reduce the impedance of the power plane together, and at the same time obtain a wider filtering effect. Through research, it is found that the reversal energy of the gate is firstly provided by the capacitance between the power supply and the ground plane, and secondly is determined by the decoupling capacitor.
✪ The selection of the reference plane should preferably be the ground plane. Both the power supply and the ground plane can be used as the reference plane and have a certain shielding effect. But relatively speaking, the power plane has a high characteristic impedance, and there is a large potential difference with the reference level. From the perspective of shielding, the ground plane is generally grounded and used as a reference level reference point, and its shielding effect is far better than that of the power plane.
✪ The key signals of adjacent layers do not cross the partition area, which will form a larger signal loop, resulting in strong radiation and sensitivity problems.
✪ There is a relatively complete ground plane under the component surface. For the multilayer board, the ground plane must be kept as complete as possible, and signal lines are usually not allowed to run on the ground plane. When the wiring density of the wiring layer is too large, consider wiring at the edge of the power plane.
✪ Key signals such as high-frequency, high-speed, clock, etc. have an adjacent ground plane. The distance between the signal line and the ground line is only the distance between the circuit board layers. The high-frequency circuit will choose the path with the smallest loop area to flow, so the actual The current always flows on the ground wire directly below the signal wire, forming the smallest signal loop area, thereby reducing radiation.
✪In high-speed circuit design, avoid the power plane layer to radiate energy to free space. In such a design, all power planes must be smaller than the ground plane and indented by 20H (H refers to the thickness of the medium between adjacent power and ground planes) . In order to better implement the 20H rule, it is necessary to minimize the thickness between the power supply and the ground plane .
②. Single-layer board
General principles of the layout of the veneer layer:
✪ The bottom of the component surface is a ground plane, which provides a device shielding layer and a reference plane for the top wiring;
✪ All signal layers are as close as possible to the ground plane;
✪ Try to avoid two signal layers directly adjacent to each other;
✪ The main power supply is as close to it as possible;
✪ Take into account the symmetry of the laminated structure.
③. Backplane
For the layer layout of the backplane, it is difficult to control parallel long-distance wiring. Therefore, the layout principles for board-level operating frequencies above 50MHz are:
✪ The component surface and welding surface are a complete ground plane (usually it can be considered as a shielding layer, and a metalized screw is used to form an integrated shielding layer with the frame);
✪ No adjacent parallel wiring layers;
✪ All signal layers are as close as possible to the ground plane;
✪ The key signal is adjacent to the ground and does not cross the partition.
④. Multilayer board
For the layering of multi-layer PCB boards, as shown in the figure below, from the perspective of EMC and other factors, the optimal layer settings are given as shown in the table below.
The main purpose of the EMC of the ground plane is to provide a low impedance ground and provide minimal noise return to the power supply. In actual wiring, the signal layer between the two ground layers and the signal layer adjacent to the ground layer are the priority wiring layers in PCB wiring. Important signals such as high-speed lines, clock lines and buses should be routed and changed on these priority signal layers.
✪ Four-layer board layout
Preferred plan 1, second choice plan 3, see the table below. The schematic diagram of the four-layer PCB is shown in the figure below.
Scheme 1: The optimal scheme of four-layer PCB board, there is a ground plane under the component surface, and the key signal is preferably arranged on the top layer.
In order to achieve a certain shielding effect, if scheme 2 is adopted, the power supply and ground plane are placed on the top and bottom layers, and the power supply and ground are too far apart, and the impedance of the power supply plane is large; the power supply and ground plane are affected by the component pads, etc. complete. Because the reference plane is not complete, the signal impedance is not continuous. In fact, since most companies use a large number of surface mount devices, the power and ground of the solution can hardly be used as a complete reference plane when the devices are getting denser, and the expected shielding effect is difficult to achieve, so the scope of use of solution 2 limited.
Scheme 3: This scheme is similar to scheme 1, and is suitable for the situation where the main components are laid out on the bottom layer or the key signals are routed on the bottom layer. This scheme is rarely used.
✪ Six-layer board layout
Preferred option 3, option 4, worst EMC effect, option 2, see the table below.
For six-layer boards, option 3 is given priority.
PCB architecture analysis:
▲Since the signal layer is adjacent to the reflux reference plane, and S1, S2, and S3 are adjacent to the ground plane, there is the best magnetic flux cancellation effect. The wiring layer S2 is preferred, followed by S3 and S1.
▲The power plane is adjacent to the GND plane, and the distance between the planes is small, which has the best magnetic flux cancellation effect and low power plane impedance.
▲The main power supply and its corresponding ground are placed on the 4th and 5th layers. When the layer thickness is set, increase the distance between S2-P and reduce the distance between P-G2 (correspondingly reduce the distance between G1-S2 layers) , In order to reduce the impedance of the power plane, reduce the influence of the power on S2.
For six-layer boards, option 4.
PCB architecture analysis:
For occasions with high local and small signal requirements, Option 4 is more suitable than Option 3. It can provide an excellent wiring layer S2. The worst EMC effect, option 2.
PCB architecture analysis:
With this structure, S1 and S2 are adjacent, S3 and S4 are adjacent, and S3 and S4 are not adjacent to the ground plane, and the magnetic flux cancellation effect is poor.
✪ Eight-layer board layout
The preferred options 2, 3, and the second option 1, are shown in the table below.
In the case of a single power supply, the advantage of Option 2 compared with Option 1 is that there is no adjacent wiring layer, and the main power supply is adjacent to the corresponding ground, ensuring that all signal layers are adjacent to the ground plane. The disadvantage is that a wiring layer is reduced.
For the case of two power supplies, it is recommended to adopt Option 3. Its advantages: no adjacent wiring layers; symmetrical laminate structure; the main power supply is adjacent to the corresponding ground. Disadvantages: Critical wiring should be reduced in S4.
✪ Ten-layer board layout
The preferred options 2, 3, and the second options 1, 4, are shown in the table below.
Option 2: For a single power supply, Option 2 is preferred. Consider option 1 in terms of cost.
Scheme 3: Power supply and its corresponding place on the sixth and seventh layers, the preferred wiring layers are S2, S3, S4; followed by S1, S5. To reduce crosstalk, avoid parallel and long-distance wiring on the S2 and S3 layers.
Option 4: Considering from the EMC point of view, compared with Option 3, a wiring layer is reduced. In the case of low cost requirements, high EMC indicators, and key single boards with two power layers, this solution can be used. The optimal wiring layer is S2 and S3.
For single boards with more than 10 layers, this article will not list them. We can make specific analysis based on the actual situation according to the above arrangement principle. It is mainly based on the number of power layers required, the number of wiring layers, the number of signals required for special wiring, and the division of power and ground, combined with the above principles.
2. The impact of layer distribution on RE testing
In order to reflect the impact of layer layout on EMC, we mainly analyzed the impact of different layer layouts on the test of radiated emission RE.
Taking the test board as a 6-layer board as an example, the first plan and the third plan are used for layout.
From cost considerations, single-board design is adopted: there are 1 power layer, 4 signal layers, and 1 ground layer.
The test conditions of the DUT: only provide 48V DC power after filtering the single board, and the single board uses software to run automatically. It only replaces the partial layer layout of the single board, and the other parts are completely unchanged. There are several single boards.
Test site conditions: The antenna height of the lifting tower is 1m, the antenna is vertically polarized, the single board is placed on the table of the 80cm high turntable, the turntable and the antenna tower are not rotated, the components of the single board face the antenna, and each single board The test position is fixed (as shown in the figure below).
Test data (see figure below):
In the first picture, the single board layout of Option 1 is that the power input -48V is wired on the top layer, the power ground BGND is wired on the bottom layer, the second layer is a complete GND, and the fifth layer is the power layer, and it is divided.
In the second picture, the single board layout of Scheme 1 is that the signal layer is wired in the third and fourth layers, while the power input -48V and ground BGND are also wired in the third and fourth layers. The second and fifth layers are complete GND and VCC respectively.
It is obvious from the test results that the layout scheme 3 (as shown in the figure below) in the RE test project of the EMC test, the radiation emission is very small, and the power supply ground impedance plays a major role in the power radiation. When the power supply ground impedance is low, it is low. End radiation is significantly reduced. The low-end radiation of the power supply on the surface layer is larger than that on the inner layer, which once again proves that the layer layout of the single board will have a great impact on the EMC performance.
