Precautions for PCB layout of crystal oscillator

Crystal oscillator, presumably everyone knows, is a device that provides the basic signal of the clock for the system. It is not very complicated in circuit design, especially in mobile phone circuit design. But once it comes to the later stage of debugging, it is often found that there are many problems caused by the crystal oscillator. In fact, a good layout can make the crystal oscillator less troublesome for the project. So, let me talk about the precautions of LAYOUT in circuit design of crystal oscillator, especially in mobile phone circuit design.

Mainly pay attention to the following points

1. The edge of the board cannot be placed

I said it in the previous EMC RE test introduction. At the same time, I believe that many hardware engineers have heard this sentence. But the reason, I believe very few people can say it. Why can't the crystal oscillator be placed on the side of the board, and what is the impact of placing it on the side of the board?

In EMC, if the crystal oscillator of the product is placed on the edge of the board, the high-speed device of the product under test will form a certain electric field with the reference ground of the test bench, resulting in parasitic capacitance and common-mode radiation. The larger the parasitic capacitance, the greater the common-mode radiation. The stronger the parasitic capacitance is, the essence of the parasitic capacitance is the electric field distribution between the crystal and the reference ground. When the voltage between the two is constant, the more the electric field distribution between the two, that is, the closer to the edge of the board, the greater the electric field strength between the two. The parasitic capacitance is also larger.

Only when the crystal oscillator is arranged in the middle of the PCB or at a certain distance from the edge of the board, due to the existence of the working ground plane on the PCB, most of the electric field is controlled between the crystal oscillator and the working ground, that is, inside the PCB. The electric field finally distributed to the reference ground is greatly reduced, and the radiated emission is lower.

In order to make it easier for everyone to understand, I attach two pictures here.
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2. Neighboring layer hollowing out processing

The reasons are mainly divided into two aspects:
a) Knowing the formation of capacitors, it is known that any two conductors that are insulated from each other and very close to each other can form a capacitor. The bonding pad of the chip crystal is square. If copper is laid underneath, a capacitor can be formed. This capacitor can be called parasitic capacitance. The capacitance formula C=εs/4πkd ε is a fixed value, S is the pad area, and d is the distance from the pad to the plane. After the crystal oscillator is fixed, the only variable in the formula is d. The size of the parasitic capacitance affects the frequency deviation of the crystal oscillator. The larger the parasitic capacitance, the more serious the frequency deviation will be affected.
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b) Inhibit heat conduction from affecting frequency deviation
In addition to load capacitance, high temperature will also affect frequency deviation. In order to avoid the frequency deviation of the crystal oscillator caused by the heat emitted by the surrounding heat source through the copper skin. Hollowing out between two layers can also insulate heat transfer.

Compared with the influence of the former parasitic capacitance, the influence of temperature is actually greater. However, there is a crystal oscillator TCXO, the temperature compensated crystal oscillator (later discussed), which can minimize this effect. Because of its own warming effect, this type of crystal oscillator is widely used in mobile phone circuits.

Even so, in order not to affect the frequency offset, for the sake of conservatism, in terms of mobile phone circuit design, two layers will be hollowed out in the projection area directly below the crystal oscillator. At the same time , placing it in the shielding cover can greatly reduce the EMC problems caused by it. The location is close to the IC and away from the edge of the board, away from high-current wiring, switch signal vibrator, earpiece, etc., and the wiring goes to the surface layer, left and right and lower layers land. The length of XTAL1 and XTAL2 should be 4.4~10.0 mm, and the wiring related to the crystal oscillator should be guaranteed to be 3mil, and the line spacing should be ≥2W .
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Origin blog.csdn.net/weixin_43772512/article/details/127603909