STM32 register

1. STM32 register is actually a linear address corresponding to the memory unit

2. GPIOA-> ODR operation of the register is actually a memory unit

#define GPIOA_BASE (APB2PERIPH_BASE + 0x00000800U)
 // defines the base address GPIOA 

#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE)
 // here GPIOA the base address into GPIO_TypeDef pointer type corresponds to the address value divided 
GPIO_TypeDef size memory 


typedef struct 
{ 
  __IO uint32_t the CRL; // corresponds to byte offset 0 of the base address on the basis 0x00000804U
 // __IO actually volatile, where 32 denotes an offset address to the base address in memory, is variable type, where the value each time it accesses memory 
  __IO uint32_t of CRH; // offset of four bytes on the base address 0x00000808U 
  __IO uint32_t an IDR; // offset of 8 bytes 0x0000080CU the base address on the basis 
  __IO uint32_t the ODR; // offset in byte 12 based on the base address 
  __IO uint32_t BSRR; //Offset base address on the basis of 16 bytes 
  __IO uint32_t BRR; // offset in byte 20 based on the base address 
  __IO uint32_t LCKR; // offset in byte 24 based on the base address 
} GPIO_TypeDef;