Getting started with STM32 - what is a register

I. Introduction

As the saying goes, the foundation is not firmly shaken. If you want to learn the microcontroller well, you must be very familiar with the underlying principles. After all, we are the bottom-level development, so the more you touch the bottom, the better, so that we can know what each code is doing 单片机的本质其实就是在操作寄存器. The single-chip microcomputer completes the action we want, such as lighting an LED light, and the library function development of stm32 is no exception. It just encapsulates the operation registers into functions. We only need to configure the parameters of the specified function, and then call the function to automatically convert the corresponding function. If you only learn library functions, you will feel like a loft in the air in the later stage. You know it and don't know why.

Summary: Registers must be learned. If it is a little difficult to learn in the early stage, you can learn a library function for a period of time and it will be much better to look at the registers after returning;

2. System architecture of STM32

The STM32 chip is a packaged product, which is mainly composed of a core and on-chip peripherals. If compared with a computer, the kernel and peripherals are like the relationship between the CPU and the motherboard, memory, graphics card, and hard disk on a computer.

The following diagram of the stm32 system structure is very important. We need to understand how stm32 works and which bus is mounted on each peripheral. What we mainly learn is the peripherals mounted on the AHB system bus.

1. Four drive units (CUP)

• Cortex™-M3 core DCode bus
• Cortex™-M3 core system bus System
• Common DMA1
• Universal DMA2

2. Four passive units (peripherals)

• Internal SRAM
• Internal flash memory FLASH
• FSMC
• AHB to APB bridge, it connects all APB peripherals

3. Drive unit

• ICode bus

The I in ICode stands for Instruction, the instruction. The kernel executes the program by reading the internal FLASH code instructions through the ICode bus .

• DCode bus

D in DCode stands for Data, that is, data, which means that this bus is used to fetch numbers. Because data can be accessed by Dcode bus and DMA bus (fetch data from flash, SRAM, or peripheral data register), in order to avoid access conflicts, it needs to go through a bus matrix to arbitrate to determine which bus is fetching. The fetched data can be temporarily stored in the registers in the Cortex™-M3 core for processing.

• System bus

The system bus mainly accesses the registers of the peripherals. We usually say register programming, that is, reading and writing registers are all done through this system bus.

• DMA bus

The DMA bus is mainly used to transmit data like the DCode bus, but the Dcode bus transmits data to occupy the resources of the kernel (cpu), while the DMA bus is equivalent to being independent of the kernel cpu but helps the kernel cpu transfer data without occupying the kernel (cpu). Resources, that is, the kernel cpu can do other things while DMA transfers data, such as lighting an LED light

• bus matrix

The bus matrix coordinates access arbitration between the kernel system bus and the DMA master bus, and the arbitration utilizes a round-robin algorithm. Because the data can be accessed by the Dcode bus and the DMA bus, 数据可以是在某个外设的数据寄存器，可以在SRAM，可以在内部的 FLASH。in order to avoid access conflicts, a bus matrix needs to be arbitrated when fetching to determine which bus is fetching.

4. Passive unit

• Internal FLASH

A brief introduction to the content stored in flash: After the programs we wrote are compiled, they are all instructions (binary code), which are stored in FLASH, and the const keyword modification in our constant or constant variable C language is also stored in FLASH.

• Internal SRAM

It is what we often call computer memory, local variables and global variables inside program functions, heap (malloc allocation) stack (local variables) and other overheads are based on internal SRAM. The kernel accesses it through the DCode bus

• FSMC

The full English name of FSMC is Flexible static memory controller, which is called flexible static memory controller. It is a very distinctive peripheral in STM32F10xx. Through FSMC, we can expand memory, such as external SRAM, NANDFLASH and NORFLASH. But one thing we should pay attention to is that FSMC can only expand static memory, that is, S:static in the name, not dynamic memory, for example, SDRAM cannot be expanded.

• AHB to APB bridge

Two AHB/APB bridges provide a synchronous connection between the AHB and 2 APB buses. The operating speed of APB1 is limited to 36MHz, and the APB2 operates at full speed (up to 72MHz), with various STM32 peripherals mounted on it. We often say that the peripherals such as GPIO, serial port, I2C, and SPI are mounted on these two buses. This is the focus of our study of STM32, which is to learn to program these peripherals to drive various external devices.

3. Memory mapping

The memory itself does not have address information, and its address is allocated by the chip manufacturer or the user 给存储器分配地址的过程就称为存储器映射. If an address is allocated to the memory, it is called memory remapping.

Program memory, data memory, registers, and input and output ports are organized in the same 4GB linear address space. Data bytes are stored in memory in little-endian format. The lowest address byte in a word is considered the least significant byte of the word, and the highest address byte is the most significant byte .

1. STM32 storage space

The 4GB mentioned above is 4GB, but the size of the storage space is determined by the number of address buses in the CPU on the chip, while the internal bus of the stm32 chip is 32. The
memory is divided into memory units one by one, 每个内存单元的大小是一个字节in order to be effective Each unit of access to the memory is numbered to the memory unit, and the number is called the address of the memory unit

How to generate address
32 address lines Each line can output positive and negative electricity (1 or 0)

After the address is allocated, the FLASH, RAM, FSMC and AHB to APB bridge (ie on-chip peripherals) of the controlled unit, these functional components are arranged together in a 4GB address space. When we are programming, we can find them by their addresses, and then operate on them (the dereference operation in C language * takes out the content and reads and writes data to them).

2. Functional division of memory areas

In this 4GB address space, ARM has been divided into 8 blocks on average, each block is 512MB, and each block is also specified. The size of each block is 512MB, obviously this is very large,

in these 8 Among the blocks, three blocks are very important, and they are also the three blocks we care about most. Block0 is used to design internal FLASH, Block1 is used to design internal RAM, and Block2 is used to design on-chip peripherals. Below we briefly introduce the functional division of specific areas in these three blocks.

• Function division of internal area of ​​memory Block0

• Function division of internal area of ​​memory Block1

• Function division of internal area of ​​memory Block2

Block2 is used to design the on-chip peripherals. According to the bus speed of the peripherals, the Block is divided into two parts, APB and AHB. The APB is divided into APB1 and APB2.

Explain the reserved addresses. These addresses do not allocate storage to him. Unit, the theory is 4GB but not so much in practice, it just gives you the indicator and not all used

3. What is a register

1. Register Map

In this area of ​​memory Block2, the on-chip peripherals are designed, and they 四个字节为一个单元，共32bit，每一个单元对应不同的功能can drive the peripherals to work when we control these units. We can find the starting address of each unit, and then use the C language pointer operation method (since a unit is four bytes, we use a pointer (int *) that takes four bytes at a time to operate these functional units) To access these units, if it is accessed through this address every time, it is not only bad for memory but also prone to errors. At this time, we can take an alias for this memory unit in the name of the function according to the function of each unit. , this 给已经分配好地址的有特定功能的内存单元取别名的过程就叫寄存器映射.

2. What is a register

Register: An alias for a unit of a specific function. This alias is called a register.所以寄存器只是特定功能的的单元的名字而已

For example, we find that the address of the output data register ODR of the GPIOB port is 0x4001 0C0C (as for how to find this address, you can skip it first, we will explain in detail later), the ODR register (that is, the 4-byte functional unit) is 32bit, The low 16 bits are valid, corresponding to 16 external IOs, and the IOs corresponding to writing 0/1 will output low/high levels. Now we let the 16 IOs of GPIOB output high level through the operation of the C language pointer, see for details.

3. How to give an alias (register) to a functional unit

We use C language #define to define a register identifier

In this way, it is much simpler to operate another functional unit, and it is easier to understand.

The next step is to find the addresses of all functional units of the GPIOB port layer by layer, and change them into registers by different functions, and then directly operate the corresponding registers in the future. Just OK.

4. Peripheral address mapping of STM32

The on-chip peripherals are divided into three buses. According to the speed of the peripherals, different buses are mounted with different peripherals. APB1 is mounted with low-speed peripherals, and APB2 and AHB are mounted with high-speed peripherals. The lowest address of the corresponding bus is called the base address of the bus, and the bus base address is also the address of the first peripheral mounted on the bus. Among them, the address of the APB1 bus is the lowest, and the on-chip peripherals start from here, also called the peripheral base address.

The starting addresses of the built-in peripherals in the used STM32F10xxx are listed.

Here I cut a paragraph to teach you how to find the bus base address and peripheral base address.

Looking at the picture above, you can find the base addresses of the following buses or peripherals one by one

• The bus base
  
  address offset relative to the peripheral base address" is the difference between the bus address and the "on-chip peripheral" base address 0x4000 0000.

• There are various peripherals mounted on the peripheral base address
  bus, and these peripherals also have their own address range. The first address of a specific peripheral is called "XX peripheral base address".
  Taking GPIO as an example, other peripherals are operated in the same way.
  
  Here, the address offset relative to the APB2 bus, the peripheral base address minus the APB2 bus base address 0X4001 0000 is the address offset relative to the APB2 bus, because the GPIO ports are all mounted on APB2 bus.

• Peripheral registers

• In the address range of the XX peripheral, 分布着的就是该外设的寄存器. Take the GPIO peripheral as an example, - GPIO (general purpose input output) is the abbreviation of general purpose input and output port. In short, it is a pin that can be controlled by STM32. The simplest application is to connect the GPIO pin to the cathode of the LED light, and the anode of the LED light to the power supply, and then control the level of the pin through STM32, so as to control the on and off of the LED light.
  
  Here we take the GPIOB port as an example to illustrate which registers are available in GPIO.
  

GPIO has many registers, each with a specific function. Each register is 32 bits, occupying four bytes, arranged in order on the base address of the peripheral, and the position of the register is described by the offset address relative to the base address of the peripheral.

The address of each register = the peripheral base address + the offset of the register relative to the peripheral base address

Here we look at several registers in the order of address offset and understand the description of the registers, as shown in the figure.

I will not list them all here. All peripherals basically have their own registers, but the functions are different and the names are different. They are arranged according to this pattern.

Four. C language encapsulation of registers

The above method is not convenient enough. Next, through the layers of nesting dolls, find the address of each peripheral register and then use the C language structure to encapsulate it.

1. Package bus and peripheral base address

In order to facilitate understanding and memory in programming, we define the bus base address and peripheral base address with the corresponding macros, and the bus or peripherals use their names as the macro names.

2. Package register list

The address of each register = the peripheral base address + the offset of the register relative to the peripheral base address

Have you found that the address of a feature register is offset by 4 each time? If you define a register type as (unsigned int), does it just occupy 4 bytes in memory, and a memory unit is 1 byte? Allocating an address, the 4 bytes are not exactly offset by 4 addresses each time, and there is a memory alignment that conforms to the structure. The memory alignment of the structure is not discussed in detail here, and an article about the structure will be published in detail in the future.

After encapsulating the register into a structure, the next step is to take out the register and operate the register. Taking GPIOA as an example, we will GPIOA外设的基地址强制类型转化为该结构体的首地址solve it perfectly

. The GPIO_TypeDef we defined, the first address of this structure is 0x4001 0800 (this is also the first address of a member variable CRL), then the address of the second member variable CRH in the structure is 0x4001 0800 +0x04, and the added 0x04 is the offset of the 4-byte address occupied by CRL , the offset of other member variables relative to the first address of the structure

3. Operation Register

Finally, we can directly use the macro to define the pointer of the GPIO_TypeDef type, and the pointer points to the first address of each GPIO port. When using it, we directly use the GPIOA pointer to access the structure member register.

5. Summary

I believe that after reading this article, you already know what a register is, and the importance of learning a good register. A detailed analysis of the eight working modes of GPIO has been released—> Eight working modes of STM32-GPIO , hand-in- hand teaching will make you a master of lighting, if If you think this article is helpful to you, please like and collect it! ! !