software design
Programming Notes
1, open the HSE / HSI, and wait for the HSE / HSI stable
2, provided AHB, APB2, APB1 prescale factor
3, set the PLL clock source provided VCO input clock division factor PLL_M, set the VCO output clock
Multiplying factor PLL_N, provided PLLCLK clock division factor PLL_P, provided OTG FS, SDIO, RNG
Clock division factor PLL_Q
4, open the PLL, and wait for the PLL stable
5, the system clock SYSCLK switched PLLCK
6, the read clock switching state bits, is selected as the system clock to ensure PLLCLK