Configuration of clock frequency - DG32

HXTAL: High-speed external clock, 4 to 32MHz external oscillator, can provide accurate main clock for the system. A crystal with a specific frequency must be placed close to the two HXTAL pins. The external resistors and capacitors connected to the crystal must be adjusted according to the oscillator selected;

LXTAL: Low-speed external clock, a 32.768kHz low-speed external crystal or ceramic resonator. It provides a low-power and accurate clock source for real-time clock circuits.

IRC8M: High-speed internal clock, high-speed internal 8MHz clock, with a fixed frequency of 8MHz. After the device is powered on, the default clock source selected by the CPU is the IRC8M clock;

IRC40K: low-speed internal clock, its clock frequency is about 40 kHz, providing clock for independent watchdog timer and real-time clock circuit;

IRC48M: There is a fixed frequency of 48MHz, which can be used as USB clock or PLL clock source

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Internal Clock Configuration

void SystemInit (void)
{
  /* FPU settings */
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
#endif
    /* reset the RCU clock configuration to the default reset state */
    /* Set IRC8MEN bit */
    RCU_CTL |= RCU_CTL_IRC8MEN;						//打开内部8MHz RC振荡器
    while(0U == (RCU_CTL & RCU_CTL_IRC8MSTB)){  	//等待内部8MHz RC振荡器稳定
    }
    RCU_MODIFY(0x50);								//AHB时钟分频设置 先二分频再四分频
    
    RCU_CFG0 &= ~RCU_CFG0_SCS;						//00:选择 CK_IRC8M 时钟作为 CK_SYS 时钟源

#if (defined(GD32F30X_HD) || defined(GD32F30X_XD))
    /* reset HXTALEN, CKMEN and PLLEN bits */
	/*外部高速时钟使能位、HXTAL 时钟监视器使能位、PLL使能位 复位，方便后续操作*/
    RCU_CTL &= ~(RCU_CTL_PLLEN | RCU_CTL_CKMEN | RCU_CTL_HXTALEN);
    /* disable all interrupts */
    /*关闭中断位*/
    RCU_INT = 0x009f0000U;
#elif defined(GD32F30X_CL)
    /* Reset HXTALEN, CKMEN, PLLEN, PLL1EN and PLL2EN bits */
    RCU_CTL &= ~(RCU_CTL_PLLEN |RCU_CTL_PLL1EN | RCU_CTL_PLL2EN | RCU_CTL_CKMEN | RCU_CTL_HXTALEN);
    /* disable all interrupts */
    RCU_INT = 0x00ff0000U;
#endif

    /* reset HXTALBPS bit */
    RCU_CTL &= ~(RCU_CTL_HXTALBPS); //旁路模式位复位
    
    /* Reset CFG0 and CFG1 registers */
    RCU_CFG0 = 0x00000000U;
    RCU_CFG1 = 0x00000000U;
    /* configure the system clock source, PLL Multiplier, AHB/APBx prescalers and Flash settings */
    system_clock_config();
}

external clock

The AHB bus is divided by 1 of the system clock.
The APB1 bus is divided by 2 of the system clock.
The APB2 bus is divided by 1 of the system clock.

Example 1
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Example 2

108=(8/2)*RCU_PLLMUPLX
RCU_PLLMUPLX=27