Clock configuration and bit band operation of STM32F407 system standard library function

Without further ado, let's go to the code first! There are comments in the code.

#include "rcc.h"


/*
函数功能：配置时钟
函数参数：无
函数返回值：无
函数描述：时钟源为HSE，系统时钟为168MHZ，其它时钟为最大值
*/
void Config_SystemClock(uint32_t PLLM, uint32_t PLLN, uint32_t PLLP, uint32_t PLLQ)
{
	RCC_DeInit();  //让所有RCC时钟为缺省值等待我们配置
	RCC_HSEConfig(RCC_HSE_ON);	//让HSE作为时钟源 
	RCC_HSICmd(DISABLE);	//让HSI不使能 有HSE就够了 一个时钟源
	if(RCC_WaitForHSEStartUp() == SUCCESS) //等待HSE起振 
	{
		RCC_ClockSecuritySystemCmd(ENABLE);	//时钟安全系统使能  时钟监测器将在 HSE 振荡器就绪时由硬件使能，并在检出振荡器故障时由硬件禁止
		
		RCC_PLLConfig(RCC_PLLSource_HSE,PLLM,PLLN,PLLP,PLLQ); //配置PLL系统时钟 让HSE作为系统时钟源
		RCC_PLLCmd(ENABLE);	//使能
		
		RCC_HCLKConfig(RCC_SYSCLK_Div1);	//高速总线不分频
		RCC_PCLK1Config(RCC_HCLK_Div4);		//APB1总线 48MHZ	最大频率
		RCC_PCLK2Config(RCC_HCLK_Div2);		//APB2总线 84HZ;  最大频率
		
		
		while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);  //这一步是关键等待PLL就绪 等于SET时就是锁住了 可以用PLL作为系统时钟了
		RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);  //确定PLL作为系统时钟
	}
}

In the code, APB1 and APB2 are set to the maximum frequency, as shown in the figure below.

The while statement in the first picture is to wait for the HSE oscillator to be ready before it can work. If the frequency is not ready, it will not take effect or there is something wrong.

The red part in the picture is the modified register, the red tick is used, and the × is forbidden to be used. I have disabled the HSI clock source, and configure other unconfigured ones when they are used.

The idea of bit band operation remembers a formula: (applicable to both peripherals and SRAM)

*(volatile uint32_t *)((0x40021414 & 0xf0000000) + 0x2000000 + ((0x40021414 &0xfffff) << 5) + (9 << 2)) = 0;

Update it:

#define BITBAND(addr,bit) ((addr & 0xF0000000)+0x2000000+((addr&0xFFFFF)<<5)+(bit<<2); This formula is easier to understand and remember.

update completed

Here is to set PF9 to 0;

Look right and left. Volatile, you can use it here or not. When using bit operations, it is usually a variable that is used frequently and needs a quick response. volatile indicates that the compiler is not allowed to optimize, and this type is commonly used in multithreading.

0x40021414 is the address of the ODR register in GPIOF.

0xf0000000, 0x2000000, 0xfffff, 5, and 2 are fixed values in the formula and do not need to be changed.

9 represents which bit corresponds to the register address.

The 0 on the right side of the equal sign is to set the position to zero

The following figure is easy to understand

The above content is the blogger’s learning notes, many of which are personal understanding plus online excerpts, mainly because they can be quickly found when used in the future.

Clock configuration and bit band operation of STM32F407 system standard library function

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