Before the introduction of the co-simulation with modelsim in quartus, this introduces co-simulation ISE / VIVADO and the modelsim
ISE configuration and VIVADO basically the same, here I am with ISE, for example, there is no ISE modelsim integrated installation package, you must first download a modelsim,
My environment: Windows 10 64 Wei, Xilinx ISE Design Suite 14.7 (D : \ the Xilinx \ 14.7), SE-64 Modelsim 10.1c
(D: \ modeltech64_10.1c).
Since I installed the Modelsim SE is generic version, comes with only a few simulation libraries (Simulation Library), so it should compile Xilinx simulation libraries. Only XE comes only Xilinx simulation libraries, if installed the XE version will not have to compile the simulation libraries. Compiled libraries can use the tool with ISE interface, you can also use the command line, where they talk about the former, if you want to use the former, you can own Baidu, in fact, the two principles are the same. Open the compiled library tool "Simulation Library Compilation Wizard": win 7 open method "Start - All Programs -Xilinx ISE Design Suite 14.7 (a different version is different) -ISE Design Tools-64-bit Tools (32-bit selected 32-bit Tools ) -Simulation Library Compilation Wizard ".
FIG open follows Win10
After opening the tool, the "Select Simulator" below to select good Modelsim version you installed, here I choose "Modelsim SE", file "Simulator Executable Location" fill in the following folder where Modelsim.exe point "Browse ..." button to add also, I have here is "D: \ modeltech64_10.1c
\ win64 "(without quotation marks, the same below unless otherwise specified), the following figure,
and Next. 
After selecting a language needs to be compiled, selected from" Both VHDL and Verilog ", both must generally used as , then Next. 
Next is to select the device, the default is to select all, if there is something you do not have access do not really choose it, so you can save some time and disk space, as shown, or Next.
Next default on the line, the whole election, the following two lines left blank, that is to add additional libraries, Next.
This step is more critical in the path "Output directory for compiled libraries" fill in the following output compiled library, the default is required. Personal recommendations to create a new separate folder, good management, as long as the same version, the next directly used, reloading is not afraid. But the name of the folder and the entire path must not have Chinese or space, remember, remember! ! ! I have here is "D: \ modeltech64_10.1c \ Xilinx_lib". Other options can default, and then point "Launch Compiled Process", as shown in FIG.
Then he began compiling a waiting After compilation there will be some build logs, Next, Finish. As long as not to become Err, Warn ignored. If Err, will review next version right path there is no Chinese or spaces.
The following set of associated ISE and Modelsim. In the "D: \ Xilinx \ 14.7 \
ISE_DS \ EDK "folder found in" modelsim.ini "," D: \ Xilinx
\ 14.7 "This is your ISE installation directory, it is impossible to enter the installation directory and then search for" modelsim.ini ",
Open, "the modelsim.ini", do not change when the function of automatic line with Notepad, the menu "format - Wrap" remove the hook.
找到“[Library]”，下面一行的“others = $MODEL_TECH/../modelsim.ini”和行的开头的分号（；）
的全部都无视。那些行开头没有分号的，格式一般是“X···X = 路径”，一直到“[vcom]”之上的都要，全部复制。
然后在 Modelsim 的安装目录下，我这儿是“D:\modeltech64_10.1c”，找到“modelsim.ini”，名字一样。
先去换个文本编辑工具吧，用记事本打开它会是乱糟糟的一片，没法改。打开后，同样是找到“[Library]”，
在它的下面粘贴上刚刚复制的那一大段东西，注意，行开头不要有分号（；），而且人家原有的就别动
它，别删掉了。只要在“[Library]”和“[vcom]”之间粘贴就行，然后保存。
打开 ISE，“开始—所有程序—Xilinx ISE Design Suite 14.7（版本不同就不同）—ISE Design Tools—64-bit
Project Navigator”，
然后在 ISE 的菜单上“Edit—Preferences…”调出 Preferences 设置窗口，在左边的“Category”下选中“ISE
General—Integrated Tools”。在 Integrated Tools 项设置中，右边的“Model Tech Simulator：”下面填入Modelsim.exe 的 文 件 路 径 ， 点 旁 边 的 “.. ” 按 键 选 中 Modelsim.exe 也 行 ，
我 这 儿 是 “ D:\modeltech64_10.1c\win64\modelsim.exe ”（ 不 要 双 引 号 ） 。如图。
到现在已经准备好了，接下来就是使用它了。新建一个工程，就不多说了，注意在“Simulator”一项选“Modelsim-SE Mixed”，“Mixed”支持两语言，“SE”是版本，选你自己对应的就成。
忘了选或想重新选的在Project –Design Properies…重新配置。
新建你的 VHDL 或 Verilog 文件，这个不多说。 如果是 VHDL 文件，则要打开两个库。 在菜单上“Edit—Preferences…”调出 Preferences 设置窗口，选中“Category”下面的“ISE Text Editor”，之后在右边“ISE Text Editor”设置中下面的那个大白框里有四行代码，把后面两行，“use IEEE.STD_LOGIC_ARITH.ALL;”
和“use IEEE.STD_LOGIC_UNSIGNED.ALL;”复制一下，然后粘贴在你的 VHDL 文件的库声明中，也就是打开这些库。完成之后，切换到仿真模式，就是点工程上面的“Simulation”，可能不同版本会不一样， ISE9.1i 是在 “Source for” 的下拉菜单中选择 Behavioral simulation， 不过意思明白就行。 建立 Test Bench 文件， 若
是 VHDL 的， 也按上面说的处理一下，就是把那两个库声明一下。在“Hierarchy”框选中 Test Bench 文件，在下面的那个框中点“Modelsim Simulator”前的加号。展开得到“Simulate Behavioral Model”，在它上面点右键，选“Process Properties…”，如图 27。这里如果直接选“Run”可能会出现如图 28 的警告，如果不出现警告而且能调用 Modelsim 仿真，那恭喜你成功了，不然就接着看吧。有警告时，如果前面的设置没问题，直接点“No”就可以用 Modelsim 仿真了。为了搞定这个警告，咱们接着整。把"D:\modeltech64_10.1c\modelsim.ini"复制到你所建的工程目录下也能搞定这个警告，不过这样太麻烦，每次都得复制，还是往下看吧。选“Process Properties…”后弹出 Process Properties
设置窗口，在右边的“Compiled Library Directory”后面填入之前编译库时设置的已编译库的路径，点旁边的“…”按钮来选定也行。如果编译库时使默认的路径，那这里就不用改了，不过得把下面的“Ignore Pro-Compiled Library Warning Check”给勾上，不然也可能有警告，反正我用默认路径时就是有警告，不知道为什么。其实只要你前面设置的正确了，这里直接把“Ignore Pro-Compiled Library Warning Check”给勾上，路径都不设也是可以的，搞定后点“Ok”。
在“Simulate Behavioral Model”上点右键，选“Run”就可以调用 Modelsim 进行仿真了。