Table of contents
PCB Modular Design 14—MIPI Module PCB Layout and Routing Design Specifications
1 Introduction
MIPI (Mobile Industry Processor Interface) is an acronym for Mobile Industry Processor Interface.
MIPI (Mobile Industry Processor Interface) is an open standard for mobile application processors initiated by the MIPI Alliance.
The completed and planned specifications are as follows:
2. MIPI DSI Specification of MIPI Alliance
DCS (DisplayCommandSet): DCS is a standardized command set for display modules in command mode.
• DSI, CSI (DisplaySerialInterface, CameraSerialInterface
• DSI defines a high-speed serial interface between the processor and the display module.
• CSI defines a high-speed serial interface between the processor and the camera module.
3. MIPI signal layout and routing requirements – checklist
layout:
① Keep away from interference sources to prevent other signals from interfering with the transmission rate and signal transmission quality.
② All display interfaces (whether in the form of interfaces or FPCs) should be placed as close as possible to the edge of the PCB board for easy plugging and unplugging.
③The position of the main chip and the display interface should not be placed too far away, and the distance of the wiring should be shortened as much as possible. The wiring is a high-speed signal.
④ If the PCB has structural requirements, it must be placed in strict accordance with the structure.
wiring:
①The MIPI impedance is usually 100ohm on the PCB.
②Reference layer: In order to suppress electromagnetic radiation, the MIPI differential line should be routed on the inner layer as much as possible, and routed on the routing layer close to the GND plane to ensure that the routing does not cross the division, otherwise it will cause discontinuity in the impedance of the differential line and increase the external The impact of noise on the differential line, if it is on the surface, try to cover the ground or increase the distance from other signals to ensure more than 20mil.
③ Equal length: The length error between the MIPI line pairs should be controlled within 10mil, and within 5mil within the pair. The equal length is to ensure that the two differential signals reach the receiving end at the same time, otherwise the correct data cannot be received.
④Symmetry: MIPI line pairs must always maintain equal length and equidistance.
⑤Principle interference: MIPI line teams must maintain a distance of more than 2w. MIPI signal lines and other high-speed signals (such as parallel data lines, clock lines, etc.) Interference sources such as power supplies should be more principled.
⑥ Grounding: In order to prevent the antenna effect, a GND via hole is not drilled every 50-100MIL for the reference GND between the MIPI lines to achieve a three-dimensional grounding. The differential line of the MIPI signal should reduce the via hole change as much as possible. The via hole will cause the discontinuity of the line impedance. If it is necessary to punch a hole and change the layer to route the line, ensure the consistency of the differential via hole, and arrange a return flow near the hole change position. Ground vias for signal return.