Detailed explanation of IC design positions: "Digital back-end engineer" employment must-learn course

The digital back-end is at the back-end of the digital IC design process, and it is a kind of post in the digital IC design category. In IC design, the digital back-end has always accounted for the largest number of people, which is why the recruitment of digital back-end engineers is huge at this stage.

Generally speaking, the digital backend can be divided into job categories: logic synthesis, layout and routing physical design, static timing analysis (STA), power analysis Power analysis, physical verification and other jobs.

1. What does the digital backend mainly do?

1. Logic Synthesis (Synthesis):

Mainly responsible for converting the RTL code into the netlist netlist used in the actual backend, a good netlist plays a decisive role in the work of layout and routing. It is necessary to optimize performance, power, and area as much as possible. Especially in today's designs that require high performance, the requirements for synthesis are very high.

The quality of synthesis largely depends on the performance of the synthesis software. The two popular synthesis tools in the industry are Design Compiler from Synopsys and Genus from Cadence. Proficiency in using the two tools is a basic condition for synthesis work.

2. Layout and routing (PD):

Layout and routing is the largest part of the digital back-end work. It is mainly responsible for the conversion process from netlist to GDSII. The steps include Floorplan, Place, CTS, Optimize, Route, ECO, etc., to ensure that the modules under its responsibility meet the timing and physical manufacturing requirements. . At the same time, it is necessary to cooperate with other engineers to provide the files they need in time, such as def, spef, netlist, etc. It is the core work in the digital backend.

Placement and routing is highly dependent on tools, and tool operations are relatively complex. Cadence's Innovus software and Synopsys' ICC are more commonly used in the industry. It takes a certain amount of time to master the use of these two tools.

3. Static timing analysis (STA):

Static timing analysis is referred to as STA. Timing verification analysis is an important part of the digital backend. The chip needs to meet the setup and hold timing requirements under various corners and other transition, capacitance, noise and other requirements. STA needs to formulate the sdc constraint file of the whole chip, and the corner of signoff and the timing eco process of the whole chip are required to select the chip. It is a demanding job.

Static timing analysis usually requires mastering the usage of Synopsys' primetime and cadence's tempus.

4. Physical Verification (PV):

Physical verification is also an important item before tape out. If the physical verification is wrong, then chip production will fail. In place and route tools, the software can only check the physical violations on the metal layer, while the real physical verification needs to check the bottom layer of the device (base layer). Therefore, the physical verification needs to combine the metal layer and the underlying metal together for a full The drc check of the chip. At the same time, it is also necessary to do full-chip LVS (layout and schematic consistency check), ERC (electrical rule check). Make sure the chip doesn't have any physical design rule violations.

Physical verification is generally carried out in the caliber of the mentor company, which is an industry-standard physical verification tool.

6. Power Analysis (PA):

Power consumption analysis is also an important part of chip signoff. With the increasing scale of chips, the status of power consumption in chips is getting higher and higher. The two major tasks of power analysis are to analyze IR drop (voltage drop) and EM (electromigration). Feedback the results to the layout and routing task force in time, so that they can modify the back-end design drawings in time to solve potential problems in the design.

The tools used for general power analysis include redhawk of Ansys Company, voltus of cadence company and ptpx of synopsys company.

2. Who are the main people dealing with the digital backend?

Digital back-end engineers usually use a project team as a team, and the tasks mentioned above will be divided into different roles. Usually, there will be a top-level engineer, an STA engineer, a power analysis engineer, a physical verification engineer and several module engineers in a project. These engineers need to cooperate with each other to complete the process from RTL to GDSII of the whole chip. , while ensuring that there are no timing and physical verification violations.

Digital back-end engineers also need to deal with front-end engineers frequently to ensure the correct function of the netlist and the correct formulation of sdc, and deliver the post-simulation files to the front-end in time, so that front-end engineers can find potential design problems through simulation as soon as possible.

We often communicate with DFT engineers, because test logic design is becoming more and more important in today's chips. Back-end engineers need to confirm with DFT engineers the formulation of test SDC, the physical direction of scan chain and other tasks.

3. The skills and conditions that digital backend needs to master.

1. The digital backend is mainly based on software tools, and mainly masters the following software (mainly cadence, synopsys, and mentor companies)

2. Layout and routing: Innovus/Encounter, ICC2/ICC

3. Synthesis: DC, Genus

4. Physical verification: Caliber

5. Static timing analysis: PrimeTime, Tempus

6. Power consumption analysis: Redhawk, Voltus, PTPX

Each platform requires you to master different skills. Usually, you only need to learn one tool for each platform. It is also difficult for a junior engineer to master all these skills. If you know how to use these tools, you will become a veteran driver.

Since digital back-end engineers need to run some automated tasks, it is also necessary to master the necessary scripting language. For example, it is more important to master the following knowledge:

Verilog、TCL、Perl、Python

All positions mainly look at two points: professional skills (skills) and project experience (experience).

So in addition to the skills listed above, it is also very important that you can actually do one or two projects, even if it is the back-end design of some small modules, especially the debugging experience accumulated during the project.

If you are a student at school, there are fewer opportunities to practice digital back-end in school, so basically you only need to understand a little about the process and timing, and you may be able to find a position as a digital back-end engineer. Now students in school learn through various channels (such as: IC Xiuzhen Academy), master the above skills, and even accumulate one or two project experiences.

4. Who can learn from the digital backend?

At this stage, digital back-end engineers are mainly recruited with a bachelor’s degree or above. The requirements for majors are not very strict, and non-integrated circuit fields are also acceptable, as long as you have mastered the above skills, even if you are not related to majors, such as materials, physics, and automation. , Mechanical and other majors can also be successfully applied.
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Origin blog.csdn.net/coachip/article/details/109474422