When using STM32, the clock is always inseparable, so it is necessary to have an in-depth understanding of the clock tree, so as to master the internal operating principle of the STM32 chip.
Article directory
1. Clock source introduction
In STM32, there are five clock sources, HSI, HSE, LSI, LSE, PLL. Here I take the STM32F103 series as an example:
①HSE: High speed external clock
HSE (High Speed External): High-speed external clock source, usually a crystal oscillator. HSE is also one of the default clock sources of the STM32 chip, and its frequency range can be between 1MHz and 25MHz. HSE can be used as system clock and PLL phase-locked loop input, and can also be input to RTC after 128 frequency division.
②HSI: High speed internal clock
High-speed internal clock source (Internal), the clock frequency is 8MHz. HSI is one of the default clock sources of the STM32 chip because of its high clock stability and precision. Can be used as system clock or PLL phase-locked loop input.
③LSI: low-speed internal clock
RC oscillator with a frequency of 40kHz. LSI is usually used as a clock source for RTC (Real Time Clock). Available for independent watchdog and RTC, and independent watchdog can only use LSI clock.
④LSE: low-speed external clock
Connect to a quartz crystal with a frequency of 32.768kHz. LSE is also used as a clock source for RTC because its frequency is very stable. For RTC use.
Note: Why is the 32.76kHz clock here? The 32.768kHz crystal oscillator is because it is an approximate integer multiple of 2 to the 15th power, that is, 32768 ≈ 2^15. Such frequency selection is related to the design of RTC, because RTC needs a relatively accurate clock source to ensure the accuracy of time. Using a 32.768kHz crystal oscillator allows the RTC to use a low-power clock source, and can process time by using the power of 2, which is convenient for programming and calculation. Therefore, the 32.768kHz crystal oscillator ensures the operation of the RTC while meeting the characteristics of low power consumption and stable performance.
⑤PLL: phase-locked loop multiplier output
Its clock input source can be selected as HSI/2, HSE or HSE/2. The frequency multiplier can be selected as 2~16 times, but the maximum output frequency should not exceed 72MHz.
The functions of the phase-locked loop include:
clock signal reconstruction: the phase-locked loop can convert an unstable input clock signal into a stable output clock signal to improve the accuracy and stability of the system clock.
Clock signal frequency division: The phase-locked loop can divide the high-frequency clock signal according to a certain ratio to meet different system clock requirements.
Clock signal frequency multiplication: The phase-locked loop can multiply the frequency of low-frequency clock signals according to a certain ratio to meet the needs of high-speed system clocks.
Frequency synthesis: The phase-locked loop can synthesize input signals of different frequencies into a new frequency signal to adapt to some specific applications, such as wireless communication.
Phase detection: The phase locked loop can detect the phase difference of the input signal and compare it with the phase of the reference signal to achieve phase synchronization.
Second, the concept of some clocks
1. System clock SYSCLK
SYSCLK refers to the system clock , refers to the main clock signal of the computer system, and is also the main clock of the entire system. The frequency of the SYSCLK signal determines the operating speed and performance of the entire system.
In a microprocessor system, the SYSCLK signal is usually provided by a crystal oscillator or other external clock sources, and then after frequency division, frequency multiplication, etc., it is used as a clock signal for various parts such as the CPU, memory, and peripherals. The higher the frequency of the SYSCLK signal, the faster the system will run, but it will also increase power consumption and heat issues.
In different computer systems, the frequency of the SYSCLK signal may vary, usually in MHz. For example, the common PC system clock frequency is about 4-5GHz, while the SYSCLK frequency in an embedded system may only be tens of MHz.
2. RTC clock
The RTC clock refers to a real-time clock (Real-Time Clock), which is a clock source independent of the CPU in a computer system and is used to provide the real-time clock function of the system. Different from SYSCLK, the RTC clock is generally not affected by the operating status of the system. Even if the system is turned off, the RTC clock can continue to run.
The RTC clock is usually provided by an independent crystal oscillator, which usually has a frequency of 32.768kHz. The precision and stability of the RTC clock are very high, which can ensure the time precision and stability of the system.
In a computer system, the RTC clock is usually used to provide real-time clock functions, such as system clock, calendar, alarm clock and other functions. For example, in power management, the RTC clock can be used to control the wake-up and sleep of the system to extend battery life; in the calendar function, the RTC clock can record the time and date of the system for users to view and manage; in the alarm clock function, The RTC clock can be used to trigger the alarm function of the system.
3. Watchdog clock
The watchdog clock is a hardware timer, which is used in the computer system to monitor the operating status of the system. When the system is abnormal or deadlocked, the watchdog clock can restart the system to resume normal operation. The watchdog clock usually consists of an independent counter and an independent crystal oscillator, which works like a timer.
In computer systems, the watchdog clock is usually controlled by the operating system or application programs, so that the system can be restarted in time in the event of a system failure. The counter of the watchdog clock usually sets a specific time interval, such as a few minutes or a few seconds. When the system is running normally, the operating system or application program needs to send a signal to the watchdog clock regularly within the specified time. To reset the counter of the watchdog clock to prevent the system from being mistaken for a failure and automatically restarting. If the system is abnormal or deadlocked, the counter of the watchdog clock will not receive a reset signal within the specified time, and the system will be automatically restarted to resume normal operation.
The watchdog clock has a wide range of application scenarios. For example, in embedded systems, servers and other applications, the watchdog clock can be used to monitor the operating status of the system and prevent the system from crashing or crashing due to software failures or hardware failures. At the same time, the watchdog clock can also be used to protect the security of the system and prevent system failures caused by unsafe factors such as hacker attacks.
4. Systick tick timer
Systick is a hardware timer, a system clock in ARM Cortex-M series chips, which provides a simple timer for the time of the calculator chip. So it can be said that Systick is a kind of clock.
The Systick timer is composed of a counter and an interrupt controller. Its counter can automatically start counting after the chip is powered on. The time interval is set by the register SYST_RVR, generally set to 1ms. When the counter reaches the set value, the Systick timer will trigger an interrupt, and various timing tasks can be realized through the interrupt processing function.
Systick timers can be used to implement functions such as timing, delay, and beat of the system, and are widely used in embedded systems. Using the Systick timer can realize the time sharing of multiple tasks and improve the efficiency and stability of the system. At the same time, the Systick timer can also be used for calibration and verification of the system clock to ensure the accuracy and stability of the system.
Therefore, although the Systick timer itself is not a clock, it can be used as an implementation of the system clock, providing timing and interrupt services, and realizing time counting, thereby helping the system to complete various tasks and functions.
3. Clock tree analysis
As shown in the figure, I will explain in blocks:
Note: In the clock tree of STM32 series chips, the leftmost vertical line usually represents the clock input source of the chip, also known as clock source input or clock source selector. Multiple clock input sources are connected to this vertical line, including internal RC oscillator, internal HSI clock, external crystal oscillator, external clock input, etc.
When the STM32 chip is initialized, it is necessary to select an appropriate clock input source according to the specific application requirements, and switch the clock input source through the clock source selector. Through the configuration of the clock source selector, functions such as selecting an appropriate clock source, controlling the switching and switching of the clock source, calibrating the clock source, and optimizing the stability of the clock source can be realized.
1.MCO
MCO is a clock output pin in the STM32 series chip, and its full name is Master Clock Output. The MCO pin can output the internal clock signal of the chip to the outside for connection to other chips or modules, such as external clock sources, LCD displays, etc.
The MCO pin can output various types of clock signals, including system clock, PLL clock, HSE clock, etc. The output clock signal frequency and type can be controlled by register settings to meet different application requirements. At the same time, the MCO pin can also be used through the GPIO multiplexing function to realize other functions, such as input capture, output comparison, etc.
2. RTC clock
It can be seen from the flow of the lines in the figure that the source of the RTC clock can be the internal low-speed LSI clock, the external low-speed LSE clock (32.768K), or it can be obtained by dividing the frequency by 128 of the HSE.
3. USB clock
There is a USB module with full-speed function in STM32. Its serial interface engine needs a clock source with a frequency of 48MHz. This clock source can only be obtained from the PLL output. It can be divided by 1.5 or 1. When using the USB module, the PLL must be enabled, and the PLLCLK clock frequency is configured as 48MHz or 72MHz.
4. SYSCLK system clock
It is the clock source for most of the components in STM32. Its clock source can be provided by HSI, HSE, and PLLCLK. Selecting an advanced chip such as STM32F1 hopes to have a relatively large clock frequency, so PLLCLK is selected as the system clock. PLLCLK is obtained from HSE or HSI through PLL frequency multiplication.
If the clock source of PLLSRC is provided by HSE , the HSE used by the development board is an 8M crystal oscillator , and after PLLMUL is multiplied by 9, it can output a 72M clock frequency to PLLCLK .
If the HSE we choose is the clock source of the PLL, the PLL is the clock source of the SYSCLK , that is, the SYSCLK is 72MHz
5. Peripheral Clock
The final source of clocks for all peripherals is SYSCLK . SYSCLK is divided by AHB frequency divider and sent to each module for use. These modules include:
①HCLK clock used by AHB bus, core, memory and DMA.
② After dividing by 8, send it to the Cortex system timer clock, namely SysTick.
③ Directly sent to the idle running clock FCLK of Cortex.
④ Send to the APB1 frequency divider. APB1 frequency divider outputs one channel for APB1 peripherals (PCLK1, maximum frequency 36MHz), and the other channel for Timer (Timer) 1 and 2 multiplier.
⑤ Send to APB2 frequency divider. The frequency division output of the APB2 frequency divider is used for the APB2 peripheral (PCLK2, the maximum frequency is 72MHz), and the other is used for the Timer (Timer) 1 frequency multiplier.
⑥ Send to the ADC frequency divider. After the ADC frequency divider is divided by 2, 4, 6, and 8, it is sent to ADC1/2/3 for use. The maximum frequency of the ADC is 14M.
⑦ After dividing by two, send it to SDIO for use.
What needs to be understood is the difference between APB1 and APB2. APB1 is connected to low-speed peripherals, including power interface, backup interface, CAN, USB, I2C1, I2C2, USART2, USART3, etc. APB2 is connected to high-speed peripherals including USART1, SPI1, Timer1, ADC1, ADC2, GPIO, etc.
In the clock tree diagram, we can also get an important information. Most of the clock output parts have an enable control, such as the AHB bus, APB1 peripherals, APB2 peripherals, core clocks, etc. When you need to use a certain clock, you must enable it, otherwise it will not work.
Summarize
After the introduction, the structure of the five parts of the clock tree is basically explained, so we can see that it is through the configuration of different clock sources of the clock tree that the microcontroller can work at the desired frequency. When using STM32CUBEMX, configure The clock tree is also an important part. After understanding it, the frequency control of the single-chip microcomputer will be more handy. In the next article, I'll analyze bitbanding operations.